HMC983 and HMC3716 PLL design ?

Hi all,

Our customer will design the PLL circuits with HMC983 and HMC3716.

They evaluated the phase noise performance with their custom boards.

Comparing the in-band phase noise characteristics of integer mode and fractional mode with the nearly same frequency setting, fractional mode deteriorates by about 5~10 dB.

At this time, if "00 = MASH1" ,"01 = MASH11" of "Reg 0Eh Sigma Delta Modulator Configuration Register [1: 0] SD Modulator Type" is set, the phase noise characteristics will change in the direction of improvement..
But these two register are "- Reserved" .

Table 22. Reg 0Eh Sigma Delta Modulator Configuration Register
[1:0] SD Modulator Type
DSM Type.
00 = MASH1 - Reserved
01 = MASH11 - Reserved
10 = MASH111 - Delta Sigma Modulator Mode B
11 - Delta Sigma Modulator Mode A

Q1 : Reg 0Eh [1:0]
Is it possible to set and use register 0Eh [1:0] 00 and 01?
If possible, what is the difference between 00 and 01 features?

Q2:Reg 0Eh [1:0]
What is the difference between the functions of register 0Eh [1:0] 10 and 11?
There seems to be no description of the difference between MASH1,11,111 and Delta Sigma Modulator Mode A and B in the data sheet.


Can you give us some advice on points and precautions when configuring a PLL using the HMC983 and HMC3716?
Also, can you provide reference designs, application notes, etc.?

Best regards


Parents Reply
  • 0
    •  Analog Employees 
    on Mar 23, 2021 11:33 AM in reply to sss@jpn


    No I cannot supply paper directly since I nor ADI was involved in writing it. I do not want to share someone else's work without permission. You could perhaps contact one of the authors directly (perhaps on LinkdIn?), I'm sure they would be happy to send you a copy.

    The paper also appeared in "JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.13, NO.2, APRIL, 2013", you might be able to find a copy of that magazine online



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