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AD9865 RX/TX nibbles


The AD9865 datasheet states that "For the AD9865, the most significant nibble defaults to 6 bits, and the least significant nibble defaults to 4 bits". However, I can't find whether the 4-bit nibble (i.e., when RXSYNC is low) is RXD[5:2] or RXD[3:0].

From the 5/5 nibble mode, I can guess that only the higher bits of of RXD are used but would you please confirm this? Is this also the same for the TXD port?

Thank you!

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