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FAQ: HMC PLL with Integrated VCO AutoCal with High N Counter/Low PFD Frequency

Question:

With an HMC PLL with integrated VCO (e.g. HMC1033) when using a high N counter value, say N > 4000 (such as when the PFD frequency is low), the PLL does not always function with VCO auto calibration (autocal). How do I get the PLL  to lock using autocal and a high N counter value?

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Answer:

Refer to PLL Operating Guide. Reg0x0A[2:0], Vtune_Resolution and section 4.2.4.1 VCO AutoCal Example.

During each autocal cycle, the VCO clocks are counted for ‘Vtune_Resolution’ reference cycles. For low reference rates, (large N counter settings), this can risk overflowing the VCO divider’s counter.
The solution is to adjust the above Vtune_Resolution bitfield based on the reference/PFD frequency being used - It is important to set the Vtune_Resultion to keep the tuning resolution at 800kHz or lower. 

It is also possible to disable auto calibration and manually write the VCO bands.

Also, for low reference frequencies it may be required to use a square wave signal to meet the slew rate requirement at lower frequencies. Please see specific product datasheet for more information.