HMC987 Default States on Power-Up

Hopefully this is a simple question, but I am a little confused by the datasheet.

What is the default state of the HMC987 when it is powered-on, in SPI control mode, and the Chip Enable is active (1)?

Table 11 depicts Reg 02h, which appears to show everything as enabled in their Default state:

However, the last paragraph of the Serial Port Interface description states that "The SPI control is required in order to re-configure the input bias network from its’ default state (Reg03h), to adjust the output power control on the RF/CML buffer, and to individually enable arbitrary LVPECL outputs."  Does the last part of that sentence mean that the defaults are actually disabled and the device has to be programmed to enable the outputs?  Or is that simply an issue with the wording?

Thanks for the help.

Parents
  • +1
    •  Analog Employees 
    on Jan 20, 2021 1:09 PM 2 months ago

    Hi,

    Register defaults given in the datasheet are power on reset values. So, all the channels are enabled and ready to use without any register configuration. If individual channels are wanted to be disabled or gain of RF buffer is needed to be changed, SPI configuration is required. These are applied when serial programming is selected with PMOD_SEL. For the channels that are active with parallel programming, please check Parallel Port Control section of the datasheet. 

    Regards,

    Kudret

Reply
  • +1
    •  Analog Employees 
    on Jan 20, 2021 1:09 PM 2 months ago

    Hi,

    Register defaults given in the datasheet are power on reset values. So, all the channels are enabled and ready to use without any register configuration. If individual channels are wanted to be disabled or gain of RF buffer is needed to be changed, SPI configuration is required. These are applied when serial programming is selected with PMOD_SEL. For the channels that are active with parallel programming, please check Parallel Port Control section of the datasheet. 

    Regards,

    Kudret

Children