ADAR1000 with RF Switch

When attempting to control the ADRF5019 by driving 3.3V out of the ADAR1000 TR SW POS,  are multiple writes required to register 0x030 and 0x031 because the chip is looking for several repeat commands or because the initial command may not result in output voltage from that pin?

I currently have no pull down/pull up resistor between the ADAR and switch, would I write to 0x030 and 0x031 before enabling RX or TX channels to abide by the ADRF5019 power up procedure? Or would it be one of my first commands after the LDO trim adjustment?

When doing a single write command to put the ADAR in a specific beam position, is it common that a single write wont be sufficient to update the chip? Or is there certain device settings/registers that work more reliably with repeat commands right after one another?

Thanks again.

  • +1
    •  Analog Employees 
    on Jan 21, 2021 5:52 PM 1 month ago

    Single SPI writes to registers 0x30 and 0x31 are all that are needed.  Note that Table 17 has an error.  This is corrected in the Errata document found here:https://ez.analog.com/rf/f/q-a/163073/adar1000-datasheet-errata

    You could definitely write to 0x30 and 0x31 before turning on the Rx or Tx paths.  You could even set the TR_SW_POS pin voltage before setting the LDO adjustment (this voltage is pretty close to nominal in its untrimmed state).

    You should not have to do any repeat SPI writes.  If you are not seeing the correct output(s), you probably don't have all the bits set correctly.   

    After the 3.3V power up, you should only have to write to register 0x31, the data of 0x90, to set the TR_SW_POS to 3.3V.  This assumes default values for register 0x30, most importantly for TR_SW_POS, keeping the SW_DRV_TR_MOPE_SEL = 0.  Here is a little bit more explanation:

    Reg

    Bits

    Bit Name

    Level

    Description

    0x31

    [2]

    TR_SOURCE

    Low

    TR_SPI bit controls Tx/Rx mode

    0x31

    [1]

    TR_SPI

    Low

    Puts part into receive mode

    0x31

    [4]

    SW_DRV_EN_TR

    High

    Enables Switch drivers (positive and negative)

    0x31

    [7]

    SW_DRV_TR_STATE

    High

    Sets switch driver polarity relative to Tx or Rx mode; in this case, set TR_SW_POS to 3.3V while in receive mode (TR low), and 0V while in transmit mode (TR high)