I am using the ADF4372 with 100MHz reference input to pin 43. The reference divider ( register 1F) is set to 1
Register 22 is set to 0. ( reference doubler disabled, reference divide by 2 disabled)
When I look at the reference divider output using the multiplexer, I see a 50MHz. square wave.
I see the same when I look at the N divider output. ( The loop is locked)
Does this mean that the phase detector frequency is actually 50MHz not 100MHz?