I'm running about 3dBhigher phase noise at 30 GHz than what my ADI_PLL simulation says it should. This is at 1 1MHz and a 10MHz offsets. The measurements are at 30 GHz using the X4 output. I'm running integer mode with a Wenzel 100 MHz PLO. This is with the eval loop filter and various CP currents. With the single ended output, will I see an improvement in Phase Noise with a differential output instead of the single ended output on the eval card?
If I look at the open loop VCO Fig 9 in the data sheet for 8GHz with the X4
1MHz offset is at -133 dBm/Hz
10MHz offset is at -153 dBm/Hz
X4 is 12dB so we get for 32 GHz
1MHz offset -121 dBm/Hz (I'm seeing -117.5)
10MHz offset -141 dBm/Hz (I'm seeing -138)
I'm measuring with a FSWP Phase Noise Analyzer and the X Corr is far below the measured levels.
Any ideas of why this is higher than it should be?