ADAR1000 + ADTR1107 evaluation setup failure, wrong pinout in UG-1283 Rev.A


We're trying to evaluate the performance of ADAR1000 and ADTR1107 working together. We purchased one eval board for each chip. Our ADAR1000-EVALZ is a rev.D board.

We downloaded all the available documentation for both boards, and proceeded to setup the test. As of today, october 9th 2020, the latest available users guide for ADAR1000-EVALZ is UG-1283 Rev A.

We first tested the ADAR1000-EVALZ on its own without issue, and today we connected it to the ADTR1107-EVAL and triple-checked the connections before powering things up. We used the pinouts described in UG1283 Rev.A for the ADAR1000 board. We powered the boards together following the appropriate sequence and the currents seemed reasonable, so we proceeded to configure the board following the configuration sequence described in ADAR1000's datasheet. Enabling the PA/LNA bias control made the -5V power supply enter constant-current mode (i.e. it tripped the current limit, which we had set to 50mA). We disconnected everything and proceeded to triple-check again but found no mistake. Then, we disconnected the ADTR board from the ADAR1000 board and checked the voltages at the bias pins and the switch control pins. There were -1.4V at  P9A's pin 21, which should be TR_SW_POS according to UG-1283 Rev.A, and that made no sense. We quickly realized that P9A pins have a mirrored legend, so what UG-1283 Rev.A says is pin 1 is actually pin 2, and so on.

We checked the schematic on UG-1283 rev.A and it seemed to match. Then we, downloaded the specific schematic for rev.D board and surely enough, it was mirrored.

So, as of today, the Rev. C/D schematic is right, but UG-1283 rev.A, the only revision available, still has the wrong pinout and carries the connector legend mirroring from rev. B. We didn't check rev C/D  schematic, we just trusted the user's guide. Also, even if we had checked the rev C/D schematic, it's very likely that we had overlooked this issue, as it's all but obvious.

We're not sure wether our setup might have fried something. All power supplies were current-limited to the values stated at the user's guides, all the connections between P9A and ADTR11007-EVAL (control and bias pins, and a couple of grounds connecte to AGND pins) were "right" according to UG, but actually mirrored. VDD_PA was never powered up (it would have instantly blown up the PA as it had the VGG_PA pin forced to '0V in this situation, but we were going to test the RX path first so we left it unpowered the whole time). 

Do you think that our setup may have damaged either board? Is it possible to claim for warranty in this situation?

Please update UG-1283 Rev. A ASAP to correct the pinout.

  • +1
    •  Analog Employees 
    on Oct 9, 2020 5:31 PM 3 months ago

    Apologies on the User Guide not being up to date.  It sometimes can take a while to update all related documentation after changes are made.  You should always consider the schematic as the most authoritative document related to the evaluation board.  In your case, the Rev. C/D schematic found on the evaluation board webpage:

    It seems like you had the ADTR1107 switch control pin connected to the ADAR1000's TR_POL pin.  Did you enable the TR_POL pin (Reg 0x31, Bit[3]=1) and set the POL bit = 1 in Register 0x31?  If you did do this, it most likely turned the ESD diode on the CTRL_SW pin of the ADTR1107.  It is hard to to say if damage occurred or not. 

    I would try running only the ADAR1000 board again, making sure all the control voltages are what you think they are.  The only test the ADTR1107 board, making sure the switch is still functional, and the PA & LNA gains are nominal.  Then finally, I would hook up the ADAR1000 board to the ADTR1107 board again, and retest.

  • I think we did not turn TR_POL on (at least not voluntarily) with the ADTR1107 connected. We didn't get that far, as we also had PA_BIAS and pins shorted to ground and the power supply entered constant current mode as soon as we set the bias levels, which is the first thing to do after resetting the chip according  to the programming sequence. We ran ground wires to P9A's AGND together with the bias and control pins.  We had the -5V supply limited to 50mA.

    So, ADTR's SW control pin got pulled negative to about -1.4V through a 200 ohm resistor, and ADAR1000's PA_BIAS1,2,and 3 pins got shorted to ground. Looking at the behaviour I think there's a fair chance that nothing got damaged, but we'll see next monday.

    Even if we had looked at the schematic first I didn't think we would have immediatelly spotted the issue and proceeded in a different way. In fact, it took us a while to realize, due to how the change is implemented in the schematic drawing from rev B to rev C/D. The schematic symbol for the connector is just reversed and there's no immediate visual cue to guide you to spot the difference quickly. It actually took us a couple of looks to the schematic to spot the pin reversal after knowing for a fact that it was reversed.

    I'm myself a hardware designer and I'm aware of how these innocent and relatively minor mistakes happen, but as this issue has big implications, I would have at least added a big red notice to the schematic pointing users to the problem, if the schematic is to be used as the most autoritative document, moreso when this issue was corrected on november 2019, almost 1 year ago.

    Please, let me know if there's any other documentation change in the pipeline for ADAR1000 or ADTR1107, or if there's any other issue of these sorts that we should be aware of.

  • Hi, just a follow up. We measured everything again with the proper connection and everything works fine, with nominal performance. Seems like nothing got damaged.

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