ADAR1000 + ADTR1107 evaluation setup failure, wrong pinout in UG-1283 Rev.A


We're trying to evaluate the performance of ADAR1000 and ADTR1107 working together. We purchased one eval board for each chip. Our ADAR1000-EVALZ is a rev.D board.

We downloaded all the available documentation for both boards, and proceeded to setup the test. As of today, october 9th 2020, the latest available users guide for ADAR1000-EVALZ is UG-1283 Rev A.

We first tested the ADAR1000-EVALZ on its own without issue, and today we connected it to the ADTR1107-EVAL and triple-checked the connections before powering things up. We used the pinouts described in UG1283 Rev.A for the ADAR1000 board. We powered the boards together following the appropriate sequence and the currents seemed reasonable, so we proceeded to configure the board following the configuration sequence described in ADAR1000's datasheet. Enabling the PA/LNA bias control made the -5V power supply enter constant-current mode (i.e. it tripped the current limit, which we had set to 50mA). We disconnected everything and proceeded to triple-check again but found no mistake. Then, we disconnected the ADTR board from the ADAR1000 board and checked the voltages at the bias pins and the switch control pins. There were -1.4V at  P9A's pin 21, which should be TR_SW_POS according to UG-1283 Rev.A, and that made no sense. We quickly realized that P9A pins have a mirrored legend, so what UG-1283 Rev.A says is pin 1 is actually pin 2, and so on.

We checked the schematic on UG-1283 rev.A and it seemed to match. Then we, downloaded the specific schematic for rev.D board and surely enough, it was mirrored.

So, as of today, the Rev. C/D schematic is right, but UG-1283 rev.A, the only revision available, still has the wrong pinout and carries the connector legend mirroring from rev. B. We didn't check rev C/D  schematic, we just trusted the user's guide. Also, even if we had checked the rev C/D schematic, it's very likely that we had overlooked this issue, as it's all but obvious.

We're not sure wether our setup might have fried something. All power supplies were current-limited to the values stated at the user's guides, all the connections between P9A and ADTR11007-EVAL (control and bias pins, and a couple of grounds connecte to AGND pins) were "right" according to UG, but actually mirrored. VDD_PA was never powered up (it would have instantly blown up the PA as it had the VGG_PA pin forced to '0V in this situation, but we were going to test the RX path first so we left it unpowered the whole time). 

Do you think that our setup may have damaged either board? Is it possible to claim for warranty in this situation?

Please update UG-1283 Rev. A ASAP to correct the pinout.

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