I test ADL5519 EVB but I have question about differential output. (OUTP, OUTN)
Below as my test condition
PINHB power = -30dBm & -15dBm
Channel A swept
Signal frequency = 3.5GHz
Keep VLVL, ADJA and ADJB are open
below is my test result
According to datasheet, OUTP = OUTA - OUTB + VLVL. For my test environment, VLVL keep open, it should be 0V and OUTP should equal OUTA - OUTB but I can see gap between OUTP and (OUTA-OUTB) in my test result. Does VLVL keep open still exist a internal voltage? Or my test environment has wrong.
Hi Leo Kuo,
Ref. Datasheet Figure 1. The VLVL is an input, intended to be a small positive voltage typically about 1VDC, derived from the adjacent pin VREF. The purpose of VLVL is for setting the differential…
Ref. Datasheet Figure 1. The VLVL is an input, intended to be a small positive voltage typically about 1VDC, derived from the adjacent pin VREF. The purpose of VLVL is for setting the differential output (OUTP, OUTN) common-mode voltage, according to the requirement of the next stage, an ADC for example. If VLVL pin is left open, it will float up to some positive voltage, and vary with the input conditions. Datasheet Figure 57 shows the detail. -Bruce H
I try to connect VREF and VLVL through a resistor R. Below table is VLVL measurement result. This measurement is keep PINHA & PINHB open but I measured VLVL =1.76V when R is DNI. I try to adjust R value but I cannot get VLVL < 1V. The VREF voltage is 1.15V but I can get over 1.15V on VLVL pin. It seem to has internal voltage affect adjustment. Do you know the equation for VLVL adjustment?
I can use superposition theorem to get VLVL value. -Leo Kuo
Without RF input drive, each detector output will indicate approx. 1.75V, as shown on datasheet curves. This voltage also appears at the inputs to the diff. amps you are testing. This is why you measure 1.76V on VLVL with nothing else connected to VLVL. If you need lower common-mode voltage, you should consider an external dedicated voltage source with low source resistance. The reason is because when VLVL pin is held at fixed voltage, the current into the VLVL pin will vary, depending on RF drive conditions.
We have no equations for the use case of driving VLVL with a resistive voltage divider. We would not recommend a simple resistive voltage divider without buffering, because the external source resistance of said resistive divider will alter the gain and balance of the internal diff. amps. But if you are curious, you could try some basic and simple modeling of the diff. amps using LTspice. All 4 resistors of each diff. amp (8 resistors total) are well matched, approx. 1k Ohms each. -Bruce H.