ADF4371 with 5 MHz passive loop bandwidth filter


I need to design a loop bandwidth filter for the ADF4371 with 5 MHz BW, but I want to avoid using op-amps since they increase the noise and jitter. Is this feasible? can someone share a topology that works? I am stuck in ADISimPLL between error 608 and 503 and can't seem to find a working design despite trying different values of Icp and sweeping the phase... I just need a 5 MHz bandwidth so my PLL can track periodic jitter of up to that much.

Thank you,


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    •  Analog Employees 
    on Jun 12, 2020 9:59 AM in reply to Ralfino

    Hard to say if it would definitely work, the purpose of the filter is to convert the charge pump current pulses to a steady tuning voltage, and it would take some testing to verify the architecture above as suitable. I cannot recommend that architecture without further testing which is difficult to do.

    My preferred op-amp for wide bandwidths is the LT6200. You may need bipolar supplies (+/- 3.3V,), with a zener diode at the output to prevent a negative voltage to the Vtune pine of the 4371. Or you could consider +5V with a voltage splitter to prevent the Vtune exceeding 3.3V.

  • Thank you for your explanation. I have an AD8057 that I'd like to use to use to build a Sallen-key LPF for the ADF4371. I am facing 2 issues

    1- this op-amp is not in the ADISimPLL list of op-amps

    2- I am not sure whether the ADISimPLL draws the op-amp circuit while paying attention to the +/- notation on the op-amp input ports. The reason I am saying that is because if I simulate an AD820 (which I also have here), the simulator shows an inverting op-amp configuration, with the positive input connected to Vr. So what is Vr?? I want to use the AD8057 in non-inverting mode as shown below. Would that work?

    Thank you