Hello,
What kind of clock sources be used for the clock input of the device? Can a synthesizer like ADF4371 be used to drive it? If yes, please advise on the circuit else please suggest the appropriate approach.
Thank you for your help in advance,
HMC874
Recommended for New Designs
The HMC874LC3C is a SiGe monolithic, ultra fast comparator which features reduced swing PECL output drivers and clock inputs. The comparator supports 20...
Datasheet
HMC874 on Analog.com
ADF4371
Recommended for New Designs
The ADF4371 allows implementation of fractional-N or Integer N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and...
Datasheet
ADF4371 on Analog.com
Hello,
What kind of clock sources be used for the clock input of the device? Can a synthesizer like ADF4371 be used to drive it? If yes, please advise on the circuit else please suggest the appropriate approach.
Thank you for your help in advance,
At page 11 of the datasheet, there are two different interfacing for clock input of the device, please refer to those figures. The CLK pin should be kept @2V DC and the swing can be +-400mV on top of that. To adjust the clock amplitude, a resistive network like Figure A1 could be used.
The clock waveform shown is a square wave. But how does one generate a square wave at these frequencies? Also, the synthesizers generate a sinusoidal signal so can they be used instead?
The clock waveform shown is a square wave. But how does one generate a square wave at these frequencies? Also, the synthesizers generate a sinusoidal signal so can they be used instead?