Hi We are working out the plan for the developmen of QPSK and 8 PSK demodulators for 480 MHz band width (Base band data) and carrier frequency (IF) of 720 MHz. The ADRF6820 IC felt meets the zero IF concersion requirement but in confusion, how to use it? Mean time, came to know that this IC is not recommending for new designs? So is there any alternate suitable IC? If so pl provide the details at the earliest.
Unfortunately, many of our Demods with Integrated VCO/PLL’s (like the ADRF6820) are on the track to EOL (aka NRND status) due to a process EOL at one of our foundries. The only ones that don’t fall…
Unfortunately, many of our Demods with Integrated VCO/PLL’s (like the ADRF6820) are on the track to EOL (aka NRND status) due to a process EOL at one of our foundries. The only ones that don’t fall into that category are shown below and it’s only 2 parts. The only other option is to build this discretely with a discrete Demod + discrete PLL+VCO or with a discrete Demod + discrete PLL + discrete VCO implementation of which we have plenty of potential parts to address with per the attached RF product selection guide. Are they open to implementing a discrete approach?
Hi, I have compared the proposed IC ADRF6821 with LTC5594 . As it is meeting my I/Q zero IF conversion requirement, Kindly suggest the suitable ADC and Xilinx FPGA circuitry/ boards to use further for our QPSK Demodulator design.
The ADC EVB interfaces with the FPGA board, (ADS7), via the SERDES connection. See attached link to the wiki site that will explain further.
The ADS7 is the FPGA only, and must be plugged into the ADC EVB or other reference designs that are shown on the 9680 product page.
Let me know if you have any questions.
I had pointed my doubts in the attachment? Can you please go through and give your comments.
AD9680 or AD9695 both are suitable to my requiremnet? So kindly give yor suggestions in view of these
From your block diagram, it looks like you do not need a demodulator. you can directly feed the RF signal of 720MHZ into the ADC and the DSP circuits in the ADC can split into I & Q & the NCO mixes it down to baseband.
If you refer to Pg 56,57 and Fig 148/149 on the datasheet of AD9680 it talks about feeding real RF signal into the ADC & it splits it into I & Q etc.. This also talks about different IF modes available and Zero IF conversion which you are interested is one of them.
With regard to the ADC information & its use in the Costas loop implementation, I have forwarded your questios to our ADC applications team, who will be able to assist you better.
Thanks & stay safe,
Answer 1: There is on-chip DDC built into the AD9680 and AD9695. We have seen many applications utilizing the on-chip DDC instead of a separate microwave down converter. There are a lot more details in the datasheet. I would suggest reviewing them to make sure the DDC specifications can meet your system requirements.
Answer 2: NCO is programmable through SPI. Please see datasheet for more details.
Answer 3: Please see datasheet.
Answer 4: I have seen applications that can achieve what you show in the diagram using on-chip DDC. Please review datasheet to make sure the DDC specifications can meet your requirement.
Hi Thank you for your support. I have gone through the data sheet. Will verify in detail w. R. T the programming for NCO freq.