Bias sequence circuit for QPA1022 power amplifier

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I have the same problem but  drain voltage is 28V in my application. Could you please share the solution with me?

None of our existing integrated active bias controllers are suitable for this because of the voltage limits. We are looking to develop active bias control circuits for our high voltage GaN PAs but currently have nothing to report.

The below mentioned is the solution given .Please have a look

I’ve attached a reference schematic that should be a good basis for you. Bear in mind that some testing and evaluation will be needed to verify that this solution will work for your application – this is a preliminary schematic.

Vdd will be the drain of your PA. Vgg will be the gate.

The LT4256 is a hot-swap controller that will provide turn-on sequencing and overcurrent protection. The “-1” suffix indicates that this is the latch-off version of the chip, as opposed to the auto-retry, which is “-2”. The LT6015 op amp is a part of a control loop that measures drain current via the voltage across R5 and adjusts Vgg to achieve the desired drain current.

A couple notes:

• You will want to make sure the LT6015 has power before the hot-swap controller enables FET M3. The best way to do this is to generate an open collector “Power Good” signal using whatever supply you’re using to generate the negative rail, and connect this to the UV pin of the LT4256.
• Depending on the output power you intend to use in your application, you may need to adjust the bias current setpoint. This can be done by changing resistor R3. The attached schematic is set up for a 180mA bias current. The bias current set-point equation for changing R3 is:
  • Idd [mA] = (220*R3[ohms]) / (R3[ohms] + 2430) , which reduces to approximately Idd [A] = .09*R3[ohms]
• This may also require changing the current limit on the LT4256. This can be done by changing the value of R7:
  • ILIMIT[A] = .055[V]/R7[ohms]
• If you intend to implement TDD operation in your application, let me know. If that is the case, you will need to switch the PA on and off rapidly – we can accommodate this, but will need to speed up the compensation on the LT6015 or potentially use a different op amp.
• You can pull up PG using the 22V rail and resistor divider, if you won’t have 5V present. You can also drive it directly if your design has accomodations for this.
• Note the power rails for the LT6015 op amp. You’ll want to ensure that the negative rail is within the bounds of what the PA can withstand – however, the op amp needs at least 3V to power up. The absolute max for the Qorvo PA you mentioned is -5V, so I used a -3.3V rail in my schematic.

The below mentioned is the solution given .Please have a look

I’ve attached a reference schematic that should be a good basis for you. Bear in mind that some testing and evaluation will be needed to verify that this solution will work for your application – this is a preliminary schematic.

Vdd will be the drain of your PA. Vgg will be the gate.

The LT4256 is a hot-swap controller that will provide turn-on sequencing and overcurrent protection. The “-1” suffix indicates that this is the latch-off version of the chip, as opposed to the auto-retry, which is “-2”. The LT6015 op amp is a part of a control loop that measures drain current via the voltage across R5 and adjusts Vgg to achieve the desired drain current.

A couple notes:

• You will want to make sure the LT6015 has power before the hot-swap controller enables FET M3. The best way to do this is to generate an open collector “Power Good” signal using whatever supply you’re using to generate the negative rail, and connect this to the UV pin of the LT4256.
• Depending on the output power you intend to use in your application, you may need to adjust the bias current setpoint. This can be done by changing resistor R3. The attached schematic is set up for a 180mA bias current. The bias current set-point equation for changing R3 is:
  • Idd [mA] = (220*R3[ohms]) / (R3[ohms] + 2430) , which reduces to approximately Idd [A] = .09*R3[ohms]
• This may also require changing the current limit on the LT4256. This can be done by changing the value of R7:
  • ILIMIT[A] = .055[V]/R7[ohms]
• If you intend to implement TDD operation in your application, let me know. If that is the case, you will need to switch the PA on and off rapidly – we can accommodate this, but will need to speed up the compensation on the LT6015 or potentially use a different op amp.
• You can pull up PG using the 22V rail and resistor divider, if you won’t have 5V present. You can also drive it directly if your design has accomodations for this.
• Note the power rails for the LT6015 op amp. You’ll want to ensure that the negative rail is within the bounds of what the PA can withstand – however, the op amp needs at least 3V to power up. The absolute max for the Qorvo PA you mentioned is -5V, so I used a -3.3V rail in my schematic.

Dear lavanya thanks for your effort. I have built your schematic in LTSpice. The only difference is that I have used CMDSH2-3 diode instead of CMPZ5241B since I couldn't find it in the library. My schematic and results are attached. As you see, I have given a 28V pulse from input but gate voltage vgg remains at -3.1V only for a limited time, not the whole time 28V input is present.

What could be the possible reason for this?

Thanks.

Dear Lavanya, thanks for your efforts. I have built your circuit in LTSpice. The only difference is that I used the CMDSH2-3 diode, and also relayed everything through additional software such as employee monitoring instead of the CMPZ5241B, since I could not find it in the library. My diagram and results are attached. As you can see, I gave a 28V pulse from the input, but the gate voltage vgg stays at -3.1V only for a limited time, not all the time the 28V input is present.

What could be the reason for this?

Thank you.

thanks for your LTSpice schematic, this is very helpful