I am testing the ADMV1013-EVALZ evaluation board in I/Q mode.I connected a network analyzer to the I_P, I_N, Q_P, Q_N Input connectors and measured poor input return loss. (Single ended measurement, not differential)The network analyzer test power is -10dBm.Notes:1. VCM = 0 V, Register 0x03, Bit 7 = 0, and Register 0x05, Bits[6:0] = 0x0512. Q_N, I_P and I_N show similar results.3. In file Q_P_IRL.PNG file you can see the return loss of Q_P input port.4. In file Q_P_Smith.PNG file you can see the impedances of Q_P input port.
I have few questions:
1. Why the input impedance is not 50ohm ? (Single ended measurement, not differential).2. Do you have return loss and impedance plots of this EVB in I/Q mode for Q_P, Q_N, I_P and I_N input connectors ?
Please see the ADMV1013 product page, tools and simulation section for the S1P files: https://www.analog.com/en/products/admv1013.html#product-documentation
Couple of questions on your measurement:
1) Did you add 0 ohm resistors on the IQ lines (JP1 to JP4). Otherwise you will be measuring an 'open'.
2) Was the LO signal applied to the LO pins, with the part turned on and the LO chain turned on? The LO chain needs to be turned on and LO signal needs to be applied to take the return loss measurement of the IQ ports.
Hello Taz,Thanks for your replay.
1. Yes, JP1-JP4 are connected on the board. (I can see the LO Leakage, Upper Side Band and Lower Side Band)2. I am connecting the LO to the LO_P connector, LO_N is disabled using the ACE software (SE_Mode_N_Side_Disabled), LO Path is ON and the input power level at LO_P connector is 0dBm.3. Why the input impedance is not 50ohm ? (Single ended measurement, not differential).4. Do you have return loss and impedance plots of this EVB in I/Q mode for Q_P, Q_N, I_P and I_N input connectors ?I have few additional questions:1. What is the absolute Max Vcm of the ADVM1013 in I/Q_Mode ? (I can't find this information in the data sheet)2. Why I can't use the following registers in I/Q Mode in order to suppress the LO leakage ? MXER_OFF_ADJ_I_N, Reg 0x07 [8:2] MXER_OFF_ADJ_I_P, Reg 0x07 [15:9] MXER_OFF_ADJ_Q_N, Reg 0x08 [8:2] MXER_OFF_ADJ_Q_P, Reg 0x08 [15:9]3. I noticed that if I use the I/Q input connectors (I_P, I_N, Q_P and Q_N) as my base band inputs but define the ADMV1013 as IF_Mode I can use the four registers shown in question 2 in order to suppress the LO Leakage. Why is that ? Can I use this option in order to suppress the LO leakage ? If not, how do you recommend to suppress the LO leakage without using an external DAC ?Thanks,
In BB mode the ports are differential so we measure the differential return loss not single ended return loss. Also when we measure the return loss other unused ports (apart from the LO port) is 50 ohm terminated. The DS plot shows that the differential return loss- measured on a similar board- is greater than 10dB (figure 71).
The max operating common mode voltage is 2.6V and the absolute maximum is 3.3V.
The Mixer Offset adjust bits in IQ mode can be used to suppress the LO leakage however in the DS we advise that the better option would be to use the DAC as it has the ability to adjust the voltage to suppress the LO leakage to a much finer resolution.
If not driving the BB ports through an external DAC you could adjust the common mode voltage to null the LO using a bias tee line on each of the four inputs.