ADMV1014 Vdet VS. Vctrl

Hi Folks!

I run into some weird problem with the 1014 on our application board which I couldn't reproduce with the evaluation board. I'm trying to understand what's going on, I don't know if it's an issue with our board design, the programming or something else.

First the DET_EN pin seems to work the other way around. I see voltage variations on the VDET pin if DET_EN is 1 (not 0 as it is in the datasheet: "The detector can be enabled by setting the DET_EN bit (Register 0x03, Bit 6) to 0. ")
The bigger problem is if the detector is enabled there is visible difference in the conversion gain, moreover there is a weird voltage on the Vctrl pin despite a 10kOhm pulldown on it.

Conversion gain (40GHz LO, upper sideband)

Below is a scope screenshot of the signals on VDET and VCTRL.

The pulses correspond to the network analyzer sweep, so the VDET signal looks all right to me.
However when there is no input, VDET is low, then VCTRL gets up to around 600mV, despite the 10k pulldown resistor on it. There is nothing on our board that would explain this behavior.

If DET_EN is 0 there is only DC on both lines.

I'm sure it's something simple that I'm overlooking. E.g. the interference of some other setting, but I can't figure it out.

Any tips would be appreciated.

Thank you,

Imre

Parents
  • I found out the P1dB Compensation option has to do with this. I noticed that we used it as the default 00, but the evaluation software sets it to 11. I changed it in our software and voila. Detector output is no longer inverted as it was before (I didn't realize this before) and there is no weird thing on Vctrl. The datasheet has zero information on what should that thing do. 

  • +1
    •  Analog Employees 
    on Dec 16, 2019 11:34 PM 10 months ago in reply to Marsupilami

    Hi,

    Yes we know about the typo in the DET_EN bit and there is a datasheet rev in progress for this so that it gets fized. Regarding the P1dB compensation it is mentioned several times in the datasheet. See relevant sections called out below:

    1) See the Start up Sequence on page 28. Copied Below:

    The ADMV1014 SPI settings require its default settings to be changed during startup for optimum performance. To use the SPI, toggle the RST pin to logic low and then logic high to perform a hard reset before starting up the device. Set Register 0x0B to 0x727C after every power-up or reset. Set Register 0x03, Bits[13:12] to 11 after every power-up or reset.

    2) On top of Specifications table (page 3, copied below):

    "RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B set to 0x727C, Register 0x03, Bits[12:13] set to 11, and ambient temperature (TA) = 25°C, unless otherwise noted."

    3) On top IQ Mode section (page 9, copied below):

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, and TA = 25°C, unless otherwise noted. Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, VCM = 1.15 V, Register 0x03, Bit 11 = 1, Register 0x03, Bit 8 = 0, and measurements are a composite of the I and Q channels. VATT is the attenuation voltage at the VCTRL pin. VATT = 0 V, unless otherwise specified.

    4) On top IQ Mode section (page 17, copied below):

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, TA = 25°C unless otherwise specified. Register 0x0B set to 0x727C, Register 0x03, Bits[12:13] set to 11, measurements performed with a 90° hybrid, Register 0x03, Bit 11 = 0, and Register 0x03, Bit 8 = 1.

    5) On top  OUTPUT DETECTOR PERFORMANCE  section (page 24, copied below)

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bit 6 = 0, Register 0x03, Bits[13:12] set to 11, and TA = 25°C, unless otherwise noted. 

    6) On top of Return Loss Section (page 25, copied below)

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, and TA = 25°C, unless otherwise noted.

    7) MxN Spurious section (page 27, copied below):

    The LO frequencies are referred from the frequencies applied to the LO_x pin of the ADMV1014. RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_ IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, and TA = 25°C, unless otherwise noted.

    8) Register Details Section (page 38, copied below):

    [13:12] P1DB_COMPENSATION Turn on bits to optimize P1dB

    Thanks,

Reply
  • +1
    •  Analog Employees 
    on Dec 16, 2019 11:34 PM 10 months ago in reply to Marsupilami

    Hi,

    Yes we know about the typo in the DET_EN bit and there is a datasheet rev in progress for this so that it gets fized. Regarding the P1dB compensation it is mentioned several times in the datasheet. See relevant sections called out below:

    1) See the Start up Sequence on page 28. Copied Below:

    The ADMV1014 SPI settings require its default settings to be changed during startup for optimum performance. To use the SPI, toggle the RST pin to logic low and then logic high to perform a hard reset before starting up the device. Set Register 0x0B to 0x727C after every power-up or reset. Set Register 0x03, Bits[13:12] to 11 after every power-up or reset.

    2) On top of Specifications table (page 3, copied below):

    "RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B set to 0x727C, Register 0x03, Bits[12:13] set to 11, and ambient temperature (TA) = 25°C, unless otherwise noted."

    3) On top IQ Mode section (page 9, copied below):

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, and TA = 25°C, unless otherwise noted. Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, VCM = 1.15 V, Register 0x03, Bit 11 = 1, Register 0x03, Bit 8 = 0, and measurements are a composite of the I and Q channels. VATT is the attenuation voltage at the VCTRL pin. VATT = 0 V, unless otherwise specified.

    4) On top IQ Mode section (page 17, copied below):

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, TA = 25°C unless otherwise specified. Register 0x0B set to 0x727C, Register 0x03, Bits[12:13] set to 11, measurements performed with a 90° hybrid, Register 0x03, Bit 11 = 0, and Register 0x03, Bit 8 = 1.

    5) On top  OUTPUT DETECTOR PERFORMANCE  section (page 24, copied below)

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bit 6 = 0, Register 0x03, Bits[13:12] set to 11, and TA = 25°C, unless otherwise noted. 

    6) On top of Return Loss Section (page 25, copied below)

    RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, and TA = 25°C, unless otherwise noted.

    7) MxN Spurious section (page 27, copied below):

    The LO frequencies are referred from the frequencies applied to the LO_x pin of the ADMV1014. RF amplitude = −30 dBm, measurements performed with a 0 mV dc bias. VCC_MIXER = VCC_QUAD = VCC_BG = VCC_LNA = VCC_VGA = VCC_ IF_BB = 3.3 V, DVDD = VCC_VVA = 1.8 V, Register 0x0B is set to 0x727C, Register 0x03, Bits[13:12] are set to 11, and TA = 25°C, unless otherwise noted.

    8) Register Details Section (page 38, copied below):

    [13:12] P1DB_COMPENSATION Turn on bits to optimize P1dB

    Thanks,

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