I'm working in a new system design. I intend to use the HMC504LC4B amplifier and the HMC981LP3E active bias controller. The problem is that the gate control voltage of the bias controller defaults to -2,5V and the amplifier's gate bias voltage range is from -2V to 0,3V. In the datasheets is suggested to contact Analog's support to workaround this issue. Obviously the amplifier is supported since it does appear in the supported amplifier list of the datasheet of the controller. What should be done?.
The second question is related to the biasing of the active multiplier HMC598 which I also want to use in the same design. Which is the correct way to bias it?. I intend to use two HMC981LP3E, one to bias the amplifier and the other the multiplier. But there is no information about the range of voltages for the gates in the datasheet and the current drawn of each component (only the total drawn of current). The idea is to enable first the amplifier and with the "trigout" signal then enable the multiplier but I' not sure if this scheme is going to work.
I support the multiplier so I'll address the second question. The HMC598 uses FET based amplifiers internally so if the correct sequence isn't followed the device will be damaged. The devices used in the HMC598 can withstand a maximum Vgd of 8V. Since the drain is tied to +5V, ‐3V is the most that can be applied to the gate without damaging the device. We typically set the gate voltages to -2.0 V to start with and once the drain is biased increase this until the total drain current is at approximately 175mA. Vgg1 should end up at about -1.25 V and Vg2 about -0.8V.
Please follow the directions for the standard amplifier biasing procedure as outlined in the attache application note.
Thank you for your quick response. So I can use two HMC981 active bias controllers (the gate voltage defaults to -2,5V). I can assume that most of the current will be drawn by the amplifier, but we don't know the current drawn individually. So I should adjust the bias of the amplifier via trimmer instead a fixed resistor, and then the bias of the multiplier again via trimmer. And of course look at the output to see if the power and the isolation is what I expected. The order is ok?, first bias the amplifier and then the doubler.
To limit the lower end of the gate voltage, you need to add two resistors to the HMC981 circuit. One resistor will connect the VNEG output to the VNEGFB pin. This resistor should be 1620 kΩ and will set the minimum VNEG voltage to -2V. The second resistor will connect the VGATE output to the VGATEFB pin. This resistor should be 866 kΩ and will set the minimum VGATE voltage during operation to -1.7V.
I've attached a PDF showing the basic circuit for this design.
You can use a similar design to bias the HMC598 if you want to limit the VGG range.
Thank you very much for the answer and for the schematic.