ADAR-1000EVALZ SPI Interface

Hi,

I am trying to talk to the ADAR1000-EVALZ through a aardvark USB to SPI adapter.

I have successfully used the SDP board to talk to the ADAR1000-EVALZ and am trying to replicate that on the aardvark adapter.

Edit: I am unable to control the ADAR from the aardvark adapter. The gain plot being observed on a vna is not there compared to programming it with the SDP.

I am sending these commands over SPI: (TX_1)

00 00 81

00 00 18

04 00 55

00 38 60

00 2F 7F

00 36 16

00 37 06

00 31 42

00 1C FF

00 20 36

00 21 36

00 28 02

I am connected from the aardvark to connector P1:

CLK - CLK

SS - SS

MOSI - MOSI

MISO - MISO

Two GND connections

I have an oscilloscope connected to P2 to debug the SPI lines. I have confirmed that I am sending these at a bit rate of 500kHz, polarity is rising/falling, phase is sample/setup and bit order is MSB first. the SS is also active low.

I have looked at other relevant posts and tried anything suggested there but no avail...

Thank you in advance



Amending forgotten 0x2136 write command
[edited by: ScepticEngineer at 10:51 AM (GMT 0) on 4 Nov 2019]
  • 0
    •  Analog Employees 
    on Oct 31, 2019 6:23 PM over 1 year ago

    What is the exact problem(s) you're observing?  I didn't quite catch it in your post...

    Some things to look at:

    • After you perform the above SPI writes, approximately how much current is being drawn on the +3.3V supply?  You are enabling all four Tx channels, so you should see about 340 to 350 mA being drawn.
    • Also, have you probed the SPI signals on P6?  This gives you access after the level translators to make sure the DUT is actually received the sent SPI commands.

    One more thing: you might want to try to set the Q vector as well and see if that changes anything.  Try writing 0x2121 as your second to last write.

  • Thank you for your fast reply. 

    Apologies for not being clear about the actual problem! The ADAR1000 does not seem to respond. I have TX1 and IO connected up to a VNA and it does not show the gain plot compared to when programming it with the SDP. 

    I am back in work on Monday so can check the current draw and probe P6 to see if the signals make it through the translators. 

    I will get back to you. Thank you! 

  • 0
    •  Analog Employees 
    on Oct 31, 2019 8:03 PM over 1 year ago in reply to ScepticEngineer

    You're welcome. 

    Another quick & simple thing to check is to make sure have the correct S21/12 displayed on the VNA (or whatever the correct ports are for TX1 and RF_IO).  I've inadvertently measured reverse isolation before, as I've bounced back and forth between measuring the Rx gain and Tx gain.  There are lots of inputs and outputs on the ADAR1000 to keep straight... 

  • Hi jdobler. Thank you again for the help last week.

    • I am seeing 330mA on the 3.3V supply.
    • Good spot with the Q vector - was actually a typo on the forum and I am writing 0x2136 as well (I will amend the post).
    • My set up is definitely correct as have it working with the SDP board and can see the gain plot.

    Progress has been made though... I am happy the DUT is receiving the data as I have found that if I send the 24 bit register commands separately then the aardvark works.

    The SDP board has long gaps between the 24bit writes where the slave select line is returned to HIGH.

    The aardvark sends the data at 500kHz while holding the slave select low.

    Does the ADAR1000 require the slave select line to be released before sending the next 24bits?

    Thank you in advance!

  • +1
    •  Analog Employees 
    on Nov 4, 2019 4:45 PM over 1 year ago in reply to ScepticEngineer

    Ah, that might be your problem. 

    For regular 24 bit writes where it is setup as: [Read/Write bit] [15 Address bits] [8 data bits], you do have to pull the CSB high between each 24 bit write.  See Figures 2 and 3 from the datasheet.

    There is a SPI block write mode where you don't have to pull the CSB high between writes, where the register address automatically increments, and data for consecutive registers can be written without sending new address bits. Data writing can be continued indefinitely until CSB is raised again, ending the write process.. 

    It is setup like this:  [Read/Write bit] [15 Address bits of first register] [8 data bits of first register] [8 data bits of the second register] ... [8 data bits of first register + n]

    See Figure 5 from the datasheet.

    Note, if you want to go from a low address to high address, you have to set the ADDR_ASCN bits in Reg 0x00.