I have a working design with the ADF4355, and on the followup spin on my board I switched to the ADF4356 thinking it had slightly better performance and was a simple drop in replacement. Now I am having trouble getting the PLL to lock. I have done the following.
1. Created the new configuration register values using the ADF4355 evaluation board software.
2. Updated the loop filter values based upon the eval board schematics.
Is there anything else that I should be considering?
Thank you in advance.
I figured out my issue and wanted to share. In checking all the hardware components, I noticed that for CREG1 and CREG2 I had values to 1000pF, not the recommend 100nF (0.1uF) values. This was a mistake in my schematic. The thing is, the ADF4355 worked with this low cap value while the ADF4356 did not. After following the eval board and putting a 1uF on CREG2 and 0.1 uF on CREG1, the ADF4356 works as expected.
Thank you for your feedback, regards Brigid.