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FAQ: HMC1131 Evaluation Board Biasing


Is it ok to Tie all VDD Inputs to a single 5V rail and both of VGG inputs to a single -2V rail?



There should be no problem with tying all 4VDD rails to a single 5V rail.

Keeping the overall filtering for each VDD pin is recommended.

The 100pF(C1-C6 : 0402) and 0.01uF(C8 - C13 : 0603) should be easily implemented.

The four 4.7uF capacitors (C15 - C20) can be combined into a single bulk cap: 4.7uF(1206 ceramic).