I am wondering the DEV_CONFIG register and its bits. We could not understand its DEV STATUS, CUST_OPERATING MODE and NORM_OPERATING_MODE bits in the datasheet.
Can you give me more details about these register and missions?
I'm pretty sure all those bit fields are used for ADI internal purposes only and you don't need to worry about writing to that register.
The ADAR1000 does not support the DEV_STATUS register and thus the this register does not control or sense anything inside the ADAR1000. The only thing it could be used for is to check if the DEV_STATUS…
Thank you for your reply but I did not understand the function of the DEV_CONFIG register specifically. Also, I did not understand its relevant bits which are DEV STATUS, CUST_OPERATING MODE, and NORM_OPERATING_MODE. What is the purpose of this register?
I was slightly incorrect: this register is non-operational for the ADAR1000.
Register 0x02 is a part of the first 16 registers: 0x00 through 0x0F, that is ADI standard SPI for all parts using SPI. For parts that support this register:
Again to be clear, if you write to this register on the ADAR1000, it will not do anything. I would treat it like it is non-existent.
We are planning to use the DEV_STATUS bits to check whether the device is operational or malfunctioned or not. So, we are going to read that register. I want to know how DEV_STATUS bits response to the status of ADAR1000 chip.
The ADAR1000 does not support the DEV_STATUS register and thus the this register does not control or sense anything inside the ADAR1000. The only thing it could be used for is to check if the DEV_STATUS's default value of 0x10 is correct. This is more of a single register SPI functionality check; it does not indicate whether the rest of the SPI or the RF blocks are functional.
The better way to indicate whether the ADAR1000 is operational or not is to monitor the current draw on the +3.3V supply.
Thank you for your reply. We will use that information.