Difference in PLL Loop filter design for LTC6948-1 using FracNWizard and ADIsimPLL


We are trying to design a PLL loop filter for PLL part: LTC6948-1 using your FracNWizard and ADIsimPLL tools.

But for the same loop filter components and charge pump values (5.6mA),  Both tools calculated Loop bandwidth (79.5KHz for ADIsimPLL & 94.4KHz for FracNWizard) differs.

Also by default the suggested components values are completely different b/w FracNWizard and ADIsimPLL tool output values.

I have attached both tool design files (With Ref noise data file) for same reference and output frequency conditions, Please check and suggest which tool output is accurate?

In ADIsimPLL there is a option to change each loop filter components to Practical available value whereas in FracNWizard that flexibility is not there.

Otherwise please suggest a best loop filter values for low phase noise requirement.



Attachments updated
[edited by: sugu89 at 3:02 PM (GMT 0) on 4 Sep 2019]
  • +1
    •  Analog Employees 
    on Sep 5, 2019 2:51 PM over 1 year ago

    FracNWizard lets you manually type in the closest standard component values and simulate.

    Either tool will give you good results, but slightly different.  I would use FracNWizard for the final design, it was the original tool for the LTC6948 and we have more history with it on this part.

  • But due we have only few inductor values available in our factory (10 uH & 20uH). We preferred to proceed with 10uH and also if I change L1 value and locked to 10uH the corresponding other component values changes are not updating in Fracnwizard whereas it is updating in ADIsimPLL tool.

    We are already designed loop filter  using ADIsimPLL (Due to all component values can be modified for available values) and tomorrow planned to test with the same.

    But again with 11.2mA charge pump current only we have designed a loop filter, Because it suggest around 10uH inductor by default and we need to do minimum changes in loop filter values.

    Otherwise if we do huge component value changes, then loop BW and phase margin may affect which may affect PLL stability.

    Please check our both loop filter designs and if possible suggest ideal loop filter values (L1 should be 10uH or 20uH).

  • 0
    •  Analog Employees 
    on Sep 11, 2019 9:56 PM over 1 year ago in reply to sugu89

    They look good.  10uH

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