question about fig 52 in ADL5569

Hi

Hi,

Fig 52 in ADL5569 looks like the solution I’ve been searching for. What I understand is that this circuit tries to solve the problem of DC coupling between the driver and the ADC.  I understand too that the resistive divider at Vcom input sets the common mode voltage that is required by the ADC input i.e. 1.4V in this case. What I need help to understand are these:

  1. What is the reason for biasing both driver inputs slightly negative?
  2. What is the reason for 2x750 Ohms to AVDD+3.3V at the both outputs?

My target is ADC9690 and it has even higher Vcom of 2.0V  so probably thing have to be recalculated.

 

Regards/Ramin