Phase adjust w/o loss of lock possible? ADFx35y (x=4,5; y=5,6)


    Customer using ADF5356, but I think the issue is the same for all of ADF4355, ADF4356, ADF5355, ADF5356... maybe others.

    Don't think any of these details matter:  f(REF) = f(PFD) = 20 MHz;  f(VCO) = ~3.7 GHz;  using RFoutB path to get x2 out f(RF) = 7.4 GHz.


    Make continual phase adjustments of output without triggering a loss of lock.  As I understand it, adjustment occurs in the ΣΔ modulator and is adjusted with respect to f(REF), but in the system app they'd effectively be looking to control phase adjustment using an [external] phase comparison to an identically-generated output on a similar synth using the same f(REF).


    Instructions pertaining to use of the phase setting in Reg 3 suggest that a write to Reg 0 is necessary to effect the phase adjustment.  Customer also confirms that by writing to Reg 3 alone they saw no phase adjustment.  But, when writing to Reg 0 there's invariably a lock detect glitch of ~12µs (even with the requisite disabling of the VCO auto-cal and of ΣΔ reset).


    Is there any workaround to prevent lock detect from glitching while a phase adjustment is made?

typo fixed
[edited by: BrianE at 7:00 PM (GMT 0) on 23 Aug 2019]