Hello
I am using HMC833 IC in my design.
Up to now I have used it in fractional mode and everything was fine.
Due to some spurious signals I would like to change its mode to integer one.
I have changed the code accordingly but for some reason I receive PLL lock status only in case the RF divider value "R" is 1. For any other values the PLL is not locked according to the provided status.
Attached the code that initializes the device.
What can be the reason for this issue?
Thanks in advance.
Status pll_setFreq(XSpi* spi, UInt4 freqInMHz, UInt4* realFreq)
{
int nInt, nFrac, devider;
UInt4 spiRead = 0;
Bool deviderFound = FALSE;
Bool needDoubler = FALSE;
UInt4 realFreqInMHz;
UInt4 vcoRegVal;
if ((freqInMHz < 25) || (freqInMHz > 6000)) {
return ERROR;
}
realFreqInMHz = freqInMHz;
if (realFreqInMHz < 1500) {
devider = 0;
while ((deviderFound == FALSE) && (devider <= 64)) {
devider += 2;
freqInMHz = realFreqInMHz * devider;
if ((freqInMHz >= 1500) && (freqInMHz <= 3000)) {
deviderFound = TRUE;
}
}
if (deviderFound == FALSE) {
return ERROR;
}
} else {
devider = 1;
if (realFreqInMHz > 3000) {
needDoubler = TRUE;
freqInMHz /= 2;
}
}
nInt = 2 * freqInMHz / 80;
// nFrac = freqInMHz - nInt*80;
// nFrac *= pow(2,24);
// nFrac /= 80;
pll_writeReg(spi, 0x0,0x00000020); // Soft reset
pll_writeReg(spi, 0x1,0x00000002); // Reset Register
pll_writeReg(spi, 0x2,0x00000002); // Reference Divider Register
pll_writeReg(spi, 0x5,0x00001628); // VCO Subsystem Register 05h
pll_writeReg(spi, 0x5,0x000060A0); // VCO Subsystem Register 04h
if (needDoubler) {
pll_writeReg(spi, 0x5,0x00002018); // VCO Subsystem Register 03h - doubler mode
pll_writeReg(spi, 0x5,0x00005010); // VCO Subsystem Register 02h - doubler mode
} else {
pll_writeReg(spi, 0x5,0x00002898); // VCO Subsystem Register 03h - fundamental mode
}
printf("devider %d\n\r", devider);
devider = devider << 7;
vcoRegVal = 0x0000E010;
vcoRegVal |= devider;
pll_writeReg(spi, 0x5,vcoRegVal); // VCO Subsystem Register 02h - setting devider
printf("PLL HF divider value %d\n\r", vcoRegVal);
pll_writeReg(spi, 0x5,0x00000000); // VCO Subsystem
// pll_writeReg(spi, 0x6,0x00030F4A); // Delta Sigma Modulator Configuration Register - Fractional mode
pll_writeReg(spi, 0x6,0x000307CA);//Delta Sigma Modulator Configuration Register - Integer mode
pll_writeReg(spi, 0x7,0x0000014D); // Lock Detect Register 32 cycles of lock detect 2048 windows size
pll_writeReg(spi, 0x8,0x00C1BEFF); // Analog Control Enable Register
pll_writeReg(spi, 0x9,0x005CBFFF); // Charge Pump Register
pll_writeReg(spi, 0xA,0x00002046); // VCO AutoCAL Configuration Register
pll_writeReg(spi, 0xB,0x0007C061); // Phase Frequency Detector Register
pll_writeReg(spi, 0xC,0x00000000); // Fine Frequency Correction Register
pll_writeReg(spi, 0xF,0x00000081); // GPO_SPI_RDIV Register lock detect output, LD_SDO Pin Driver always on
pll_readReg(spi, 0x12, &spiRead);
pll_writeReg(spi, 0x3,nInt); // Integer Frequency Register Integer Part
// pll_writeReg(spi, 0x4,nFrac); // Integer Frequency Register Fractional Part
pll_readReg(spi, 0x12, &spiRead);
if (spiRead == 0xFF000003) {
// printf("PLL locked at %d[MHz]\n\r", realFreqInMHz);
*realFreq = realFreqInMHz;
return SUCCESS;
} else{
printf("PLL NOT locked at %d[MHz] (0x%08X)\n\r", realFreqInMHz, spiRead);
return ERROR;
}
}
Edit Notes
tag[edited by: lallison at 5:03 PM (GMT 0) on 16 Jul 2019]
