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ADF4360-8 vtune CP filter



		

			

									
						Bringstrup
					
							

			
				
									
											
							 		
		        	            							
			
			    	
			                    
                
				                on Apr 26, 2019 
				
			
			
		


				
		

		    		    
		    
		    	
			
Hi,


I am trying to figure out what purpose the filter between vtune and CP has, as that is not really explained in the datasheet.




Obviously it is a low-pass filter, but what is it filtering?


What impact does it have on frequency selection?




I would have loved for there to be some equations explaining the functionality of this filter, so I could manually calculate an appropriate filter, but sadly there aren't any.




Any help is much appreciated.




Best Regards


Frederik

								


				
				
		

			
						
									
									
						
						
			
			
			
			
		


					

			





	










	

	

					



			


				
	









	
    
	

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                                 Analog Employees 
                                
                            
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                on Apr 29, 2019 2:29 PM
            
            
					
    
	
    

		
		
    
					
    Hi Frederik,
    

    

    The filter you are referring to is a loop filter, one of the blocks that make up a PLL system. 
    

    Its purpose is to keep help keep the PLL in a stable state by filtering things like startup ripple and reference spurs/ripple and also to set the behavior of the PLL depending on the application. For example, a filter with a narrow loop bandwidth will have improved phase noise and reduced spurs but the PLL will take longer to lock. 
    

    

    Rather than manually calculating filter component values, I highly recommend you download our free software, ADIsimPLL (https://form.analog.com/form_pages/rfcomms/adisimpll.aspx). ADIsimPLL will allow you to run an ADF4360 simulation and will, among other things, generate loop filter component values based on your system requirements (frequency range, CP current etc.). By changing the loop bandwidth and phase margin you can see in real time how this effects lock time and phase noise.
    

    

    Regards,
    

    Alex
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
				
						
						
				
				
		
		
    
			
		
    
	
    

    

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