Register Settings for LTC5586

Can I get a of C-Header file and/or code snippet for register settings ? ( A list of predefined register names and adresses )

Also an idea for what the functions in "Appendix Table 9" of the datasheet do would be nice, because i can't implement a windows application in my controller!

Thanks!

Parents
  • #ifndef _LTC5586_H
    #define _LTC5586_H
    
    #include <stdint.h>
    #include <math.h>
    
    const int DEF_FREQ_INDEX = 12;
    const double DEF_FREQ = 2069.9;
    
    const double INDEX_TO_FREQ[] = {
        300,  339,  398,  419, 556,  625,  801,  831,  1046,
        1242, 1411, 1696, DEF_FREQ, 2070, 2470, 2980, 3500,
    };
    
    const uint8_t INDEX_TO_CF1VAL[] = {
        0x1F, 0x15, 0x0E, 0x11, 0x0A, 0x0F, 0x0E, 0x08, 0x1F,
        0x15, 0x11, 0x0F, 0x08, 0x08, 0x02, 0x01, 0x00,
    };
    
    const double INDEX_TO_FREQVAL[] = {
    	0x7F, 0x78, 0x77, 0x5F, 0x57, 0x3F, 0x3B, 0x35, 0xFF,
        0xFC, 0xDA, 0xBF, 0xE3, 0xB5, 0xAA, 0x93, 0x80
    };
    
    const uint8_t CF1_MASK = 0x1F;
    
    // Register and bit for the RF channel switch (RFSW)
    const uint8_t RF_CHANNEL_REG = 0x17;
    const int     RF_CHANNEL_BIT = 0;
    
    // Registers, scale and offset for calculating value of DCOI and DCOQ
    const uint8_t DC_OFFSET_I_REG = 0x0E;
    const uint8_t DC_OFFSET_Q_REG = 0x0F;
    const double  DC_OFFSET_SCALE = 0.635;
    const int8_t  DC_OFFSET_OFFSET = 128;
    
    // register, mask and offset for AMPG
    // scale is 1, mask is for bits 6:4
    const uint8_t IF_AMP_GAIN_REG = 0x15;
    const uint8_t IF_AMP_GAIN_MASK = 0x07;
    const int8_t  IF_AMP_GAIN_OFFSET = -8;
    
    // register, mask, scale and offset for GERR
    // mask is for bits 7:2
    const uint8_t IQ_GAIN_ERR_ADJ_REG    = 0x11;
    const uint8_t IQ_GAIN_ERR_ADJ_MASK   = 0xFC;
    const double  IQ_GAIN_ERR_ADJ_SCALE  = 0.0153;
    const int8_t  IQ_GAIN_ERR_ADJ_OFFSET = 32;
    
    // scale and offset for PHA
    const double IQ_PHASE_ADJ_SCALE = 0.1;
    const int    IQ_PHASE_ADJ_OFFSET = 256;
    
    // Register and bit for SDO_MODE
    const uint8_t SDO_MODE_REG = 0x16;
    const int     SDO_MODE_BIT = 2;
    
    // Register and mask for ATT
    // scale is 1 and offset is 0
    const uint8_t RF_ATTEN_REG = 0x10;
    const uint8_t RF_ATTEN_MASK = 0xF8;
    
    // To reset you always write 0xF8 to register 0x16
    const uint8_t RESET_REG = 0x16;
    const uint8_t RESET_VAL = 0xF8;
    
    // sample function to show how scale and offset are used in above constants
    uint8_t value_to_byte(double value, double scale, uint8_t offset)
    {
        return uint8_t(round(value / scale)) + offset; // 0.5 is for rounding, if value is negative this would be wrong
    }
    
    // dummy binary search used in next function
    int binary_search(const double table[], double value) {
        // TODO: implement binary search
        return -1;
    }
    
    // This function shows how to set the CF1, CF2, LF1 and BAND bits to tune for the desired frequency
    // CF1/2 are capacitors, LF1 is an inductor and BAND sets the LO matching band to high or low
    // The values for CF2, LF1 and BAND are lumped together to a single byte that is looked up from
    // INDEX_TO_FREQVAL.
    // To use this function as-is, a binary search would have to be implemented to get the index from
    // the desired frequency, however that probably isn't what you want, you would probably just use
    // the index directly in a real system.
    // Note that register 0x12 is not completely overwritten, bits 5-7 are unchanged so they should be
    // valid before this function is called.
    void freq_to_regs(double freq, uint8_t* reg0x12, uint8_t* reg0x13)
    {
        int index = binary_search(INDEX_TO_FREQ, freq);
        uint8_t cf1_val = INDEX_TO_CF1VAL[index];
        uint8_t freq_val = INDEX_TO_FREQVAL[index];
        *reg0x12 &= ~CF1_MASK;
        *reg0x12 |= cf1_val;
        *reg0x13 = freq_val;
    }
    
    // This function shows how to set the PHA register values.
    void iq_phase_adj_to_regs(double value, uint8_t* reg0x14, uint8_t* reg0x15)
    {
        int reg_val = int(round(value / IQ_PHASE_ADJ_SCALE)) + IQ_PHASE_ADJ_OFFSET;
        uint8_t bit0    = uint8_t(reg_val & 0x01);
        uint8_t other_bits = uint8_t(reg_val >> 1);
        *reg0x15 &= 0x7F;
        *reg0x15 |= bit0 << 7;
        *reg0x14 = other_bits;
    }
    
    #endif // _LTC5586_H
    

Reply
  • #ifndef _LTC5586_H
    #define _LTC5586_H
    
    #include <stdint.h>
    #include <math.h>
    
    const int DEF_FREQ_INDEX = 12;
    const double DEF_FREQ = 2069.9;
    
    const double INDEX_TO_FREQ[] = {
        300,  339,  398,  419, 556,  625,  801,  831,  1046,
        1242, 1411, 1696, DEF_FREQ, 2070, 2470, 2980, 3500,
    };
    
    const uint8_t INDEX_TO_CF1VAL[] = {
        0x1F, 0x15, 0x0E, 0x11, 0x0A, 0x0F, 0x0E, 0x08, 0x1F,
        0x15, 0x11, 0x0F, 0x08, 0x08, 0x02, 0x01, 0x00,
    };
    
    const double INDEX_TO_FREQVAL[] = {
    	0x7F, 0x78, 0x77, 0x5F, 0x57, 0x3F, 0x3B, 0x35, 0xFF,
        0xFC, 0xDA, 0xBF, 0xE3, 0xB5, 0xAA, 0x93, 0x80
    };
    
    const uint8_t CF1_MASK = 0x1F;
    
    // Register and bit for the RF channel switch (RFSW)
    const uint8_t RF_CHANNEL_REG = 0x17;
    const int     RF_CHANNEL_BIT = 0;
    
    // Registers, scale and offset for calculating value of DCOI and DCOQ
    const uint8_t DC_OFFSET_I_REG = 0x0E;
    const uint8_t DC_OFFSET_Q_REG = 0x0F;
    const double  DC_OFFSET_SCALE = 0.635;
    const int8_t  DC_OFFSET_OFFSET = 128;
    
    // register, mask and offset for AMPG
    // scale is 1, mask is for bits 6:4
    const uint8_t IF_AMP_GAIN_REG = 0x15;
    const uint8_t IF_AMP_GAIN_MASK = 0x07;
    const int8_t  IF_AMP_GAIN_OFFSET = -8;
    
    // register, mask, scale and offset for GERR
    // mask is for bits 7:2
    const uint8_t IQ_GAIN_ERR_ADJ_REG    = 0x11;
    const uint8_t IQ_GAIN_ERR_ADJ_MASK   = 0xFC;
    const double  IQ_GAIN_ERR_ADJ_SCALE  = 0.0153;
    const int8_t  IQ_GAIN_ERR_ADJ_OFFSET = 32;
    
    // scale and offset for PHA
    const double IQ_PHASE_ADJ_SCALE = 0.1;
    const int    IQ_PHASE_ADJ_OFFSET = 256;
    
    // Register and bit for SDO_MODE
    const uint8_t SDO_MODE_REG = 0x16;
    const int     SDO_MODE_BIT = 2;
    
    // Register and mask for ATT
    // scale is 1 and offset is 0
    const uint8_t RF_ATTEN_REG = 0x10;
    const uint8_t RF_ATTEN_MASK = 0xF8;
    
    // To reset you always write 0xF8 to register 0x16
    const uint8_t RESET_REG = 0x16;
    const uint8_t RESET_VAL = 0xF8;
    
    // sample function to show how scale and offset are used in above constants
    uint8_t value_to_byte(double value, double scale, uint8_t offset)
    {
        return uint8_t(round(value / scale)) + offset; // 0.5 is for rounding, if value is negative this would be wrong
    }
    
    // dummy binary search used in next function
    int binary_search(const double table[], double value) {
        // TODO: implement binary search
        return -1;
    }
    
    // This function shows how to set the CF1, CF2, LF1 and BAND bits to tune for the desired frequency
    // CF1/2 are capacitors, LF1 is an inductor and BAND sets the LO matching band to high or low
    // The values for CF2, LF1 and BAND are lumped together to a single byte that is looked up from
    // INDEX_TO_FREQVAL.
    // To use this function as-is, a binary search would have to be implemented to get the index from
    // the desired frequency, however that probably isn't what you want, you would probably just use
    // the index directly in a real system.
    // Note that register 0x12 is not completely overwritten, bits 5-7 are unchanged so they should be
    // valid before this function is called.
    void freq_to_regs(double freq, uint8_t* reg0x12, uint8_t* reg0x13)
    {
        int index = binary_search(INDEX_TO_FREQ, freq);
        uint8_t cf1_val = INDEX_TO_CF1VAL[index];
        uint8_t freq_val = INDEX_TO_FREQVAL[index];
        *reg0x12 &= ~CF1_MASK;
        *reg0x12 |= cf1_val;
        *reg0x13 = freq_val;
    }
    
    // This function shows how to set the PHA register values.
    void iq_phase_adj_to_regs(double value, uint8_t* reg0x14, uint8_t* reg0x15)
    {
        int reg_val = int(round(value / IQ_PHASE_ADJ_SCALE)) + IQ_PHASE_ADJ_OFFSET;
        uint8_t bit0    = uint8_t(reg_val & 0x01);
        uint8_t other_bits = uint8_t(reg_val >> 1);
        *reg0x15 &= 0x7F;
        *reg0x15 |= bit0 << 7;
        *reg0x14 = other_bits;
    }
    
    #endif // _LTC5586_H
    

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