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Phase detector of the HMC807LP6CE does not work



		

			

									
					    csrmniirs
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Apr 25, 2019 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Schematic is similiar to EVAL Kit. Integer mode. Fref=10MHz. Loading sequence: REG 06h: frac_rstb=0; buff_rstb=0; REG 03h: intg; REG 09h: setting cp_UPcurrent_sel, cp_DNcurrent_sel; REG 0Bh: pfd_phase_sel=1. Incoming data verified by reading procedure. We made sure that the changing of the charge pump current thru REG 09h impacts the CP Output. But we don't see the  locked VCO output, LD=0, VCO output signal is on the upper rail and CP output is about 200 mV (600 mV when CP current=0).
    

    Could you share an idea what happens ?
    

    Thanks in advance, Dmitry Kuznetsov, RF department of Moscow Radio Research Institute/
    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	















    
	
    
	
    
					



			








	
	
	
	



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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                        
                on Apr 29, 2019 6:03 PM
            
            
					
      
	
      

		
		
      
					
      Hello Mr. Kuznetsov,
      

      

      Please note that this uses one of our older PLL's and as such the INT and FRAC registers are not double buffered so the change takes place immediately after the write. Please consult the User Guide for additional information regarding use of an interim INT value and the proper sequence. 
      

      If you could please provide the register file arranged in the order that it is being written as well as the carrier frequency and loop filter schematic I may be able to help a bit more. 
      

      Have you reviewed the register settings shown in the User Guide, Operating Guide for the HMC807 and FAQ for the HMC700 (same functionality as PLL in HMC807)? If not I've attached them below. 
      

      

      PDFPDFPDF
      

      

      

      Best Regards, 
      

      

      Marty
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                        
                on Apr 29, 2019 6:03 PM
            
            
					
      
	
      

		
		
      
					
      Hello Mr. Kuznetsov,
      

      

      Please note that this uses one of our older PLL's and as such the INT and FRAC registers are not double buffered so the change takes place immediately after the write. Please consult the User Guide for additional information regarding use of an interim INT value and the proper sequence. 
      

      If you could please provide the register file arranged in the order that it is being written as well as the carrier frequency and loop filter schematic I may be able to help a bit more. 
      

      Have you reviewed the register settings shown in the User Guide, Operating Guide for the HMC807 and FAQ for the HMC700 (same functionality as PLL in HMC807)? If not I've attached them below. 
      

      

      PDFPDFPDF
      

      

      

      Best Regards, 
      

      

      Marty
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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													0
							
			
				
									
							        
			
			
			
        
            
			                            
                        
                on May 6, 2019 7:55 AM
            
            
												
						in reply to MRichardson
					
									
        
	
        

		
		
        
					
        Hello Marty,
        

        Thank you for your help. Could you help a bit more?
        

        I've attached here the loop filter schematic. Our carrier frequency is 12800 MHz and the REF frequency is 10 MHz. I put the register writting sequence below.
        

         
        

        On PowerUp I write:
        


        Register 6
        0x0D08, 0x450E

        Register 3
        0x0600, 0x0A00

        Register 9
        0x13F8, 0x0000

        Register B
        0x1600, 0x10F4;
        

         
        

        After reset I write:
        


        Register 0
        0x0000, 0x0002;
        

         
        

        then I write the same that on PowerUp
        

         
        

        Thanks in advance,
        

        best regards, Dmitry 
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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