I have a question related to the locking of the ADF4108.
We build a PCB, having this PLL loop with an active loop filter and everything works fine. Programming the device, using the VCO and requesting 1 GHz works perfectly. If you go up in frequency (e.g. 1.5 GHz), the PLL locks. This goes on all the way up to 2 GHz. If I program the ADF4108 from 2 GHz to go back to 1GHz, I get general generated output signals. So no exact frequency, but a random generated clutter of frequencies. If this happens, I have to reset the PLL completely, meaning turning off the power supply. No way to get out of this randomly generated output again.
Does this mean at that moment that the PLL is in a free running status, too far away from his normal band? This shoudln't be the case, because the VCO is build to generate 1 to 2GHz and all values in between. I'm not driving the VCO into a strange range or so. I'm just switching from the highest to the lowest frequency. This of course means going from +15 Volts to 0 Volts.
Can someone clarify please?
Instead of resetting the part after you go from 2GHz to 1GHz, could you try forcing charge pump up, then forcing charge pump down, then writing normal operation and see if this gets the part to lock?
To do this you will have to use the hidden testmodes in the part:
Force CP UP: R Counter Latch, bits[19:18] = 1
Force CP DOWN: R Counter Latch, bits[19:18] = 2
Normal CP operation: R Counter Latch, bits[19:18] = 0
I'm sorry for my very late reply, but indeed your proposed solution worked fine! We also looked deeper into the construction of the active loop filter and discovered some discripanties there.
Meanwhile everything works fine.
Once again many thanks for your inputs!