I found the attached file on EngineerZone.
Q1: Is this the latest and greatest biasing circuit for the HMC460LC5?
Q2: How is VGate calculated and what is its value?
- There is no the latest and greatest circuit, just depends on DUT that you use. In your case, you can use any of these HMC920, HMC980 and HMC981
-Since Absolute maximum ratings for HMC460LC5…
-Since Absolute maximum ratings for HMC460LC5 for Gate bias =-2 to 0V. Therefore you need to use this for Vgate=-2V. You can use for Vneg=-2.2V
but both of these voltages are set by adjusting Resistors R5,6,7,8 so for your case R6=R8=open; R5=3038kOhm and R7=1603.3kOhm
I have attached pics so you can see which resistors. Although I sent pic for HMC980, these adjustments are applicable HMC981 as well.
-Now you need to calculate Vdd and Idrain:
Idrain =32(A)/Rsense page13-13
I hope this helps. Let me know if you need something else.
I have a few question please:
The datasheet for the HMC981 has a Power Up Waveform where Vdd has to power up before VDIG.
How critical is this datasheet spec?
However I have an issue. I am using 2 LDO's and the power up time for the VDD is slower than the VDIG.
i.e. VDD = ~200ms VDIG ~ 10ms
I am considering the attached circuit to help with the startup. i.e. it will ensure the VDD is 80-90% up before VDIG; What do you think?
What is the PSSR like on the HMC981? I am using low noise LDO's for the power management. Is this overkill?