We have built our prototype following the indications form the datasheet and the circuit example but it does not work, there is no Loop Lock and the HMC699 gets very very hot. The system must lock to 5920MHz, we asked for the programming registers in this link https://ez.analog.com/rf/f/q-a/91347/hmc699-programming-registers and it seems to be ok.
I will attach the design files from ADI SIM PLL and HITTITE PLL Design software and the electrical schematic from my test board.
- TCXO is AOCJYR-20.000MHz-M5627LF form Abracon.
- VCO is a DCO579582-5 from Synergy MW
- Filter op amp is AD797 with unipolar power supply and we also have tried the LT6200 rail to rail one.
- We have also tried to invert the polarity polarity for the PFD.
I hope anyone could help us to solve our problem, thanks in advance