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PLL Problems Occurring During Temperature Test (ADF4106)

PGS1029
on Aug 10, 2018

Hello.

We used the ADF4106 to output 1950MHz.

During the temperature test, when operating from room temperature to low temperature (+ 25 ° C -> -33 ° C, 2  ° C/min), the following phenomenon occurs.

In the PSA spectrum, TRACE2 was MAX HOLD and it was observed that small noise was generated during operation. During operation, no external CLK other than the power source was entered.

Attached photo 1 is LOOP FILTER BW 58KHz / Phase margin 68deg

Attached photo 2 is LOOP FILTER BW 70KHz / Phase margin 58deg 

OP AMP was used as the AD8610.

I changed the loop filter to see that the frequency was slightly reduced, but I want it to disappear completely.

Please let us know what caused the phenomenon and how to solve it.

attachments.zip
  • +1 on Aug 14, 2018 10:47 AM

    Hello,

    I assume, that your D.U.T. is whole PLL system - reference signal 100MHz, VCO and PLL chip. There can be more reasons for this behavior. E.g. bad connection - flux is not melt properly at some pin (it happen me few years ago, I got similar observation), vibrations of climatic chamber, higher harmonics from reference buffer or VCO buffer at lower temperatures. What kind of capacitors do you use in the loop filter? SMT film capacitors, with PET or PEN dielectric material? 

    Generally, I recommend to take freezing spray and  try to identify the root cause of described problem - PLL chip or loop filter or VCO or reference signal.

    Best Regards

    Viktor