Products In This Thread

ADF4153 Production
The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers...
Datasheet
ADF4153 on Analog.com

ADF4154 Recommended for New Designs
The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers...
Datasheet
ADF4154 on Analog.com

ADF4156 Production
The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless...
Datasheet
ADF4156 on Analog.com

ADF4157 Production
The ADF4157 is a 6 GHz fractional-N frequency synthesizer with a 25-bit fixed modulus, allowing subhertz frequency resolution at 6 GHz. It consists of...
Datasheet
ADF4157 on Analog.com

ADF4158 Recommended for New Designs
The ADF4158 is a 6.1 GHz, fractional-N frequency synthesizer with modulation and waveform generation capability. It contains a 25-bit fixed modulus, allowing...
Datasheet
ADF4158 on Analog.com

ADF4159 Recommended for New Designs
The ADF4159 is a 13 GHz, fractional-N frequency synthesizer with modulation and both fast and slow waveform generation capability. The part uses a 25-bit...
Datasheet
ADF4159 on Analog.com

  • Replies 2 replies
  • Subscribers 66 subscribers
  • Views 784 views
  • Users 0 members are here
Options
Related 

        

            Post
             Go back to editing
        

    

    


    

    




















	
	
			
	
		
			
	
	
		

		
Serial Data Output of PLL devices



		

			

									
					    ADIApproved
					
							

			
				
									
											
			
			
				
  •  Analog Employees  

			
			
			    	
			                    
                
				                on Nov 23, 2012 
				
			
			
		


				
		

		    		    
		    
		    	
			
ADI PLLs are typically programmed using a three-wire serial interface, where the serial programming data is clocked into an internal shift register and is then latched onto the internal data bus on a rising edge of latch enable (see SPI Programming section in relevant datasheet for more details). To help with chip programming debug a Serial Data Output option has been added to several of the ADI PLLs, including the ADF4153, ADF4154, ADF4156, ADF4157, ADF4158 and ADF4159.

 
Read more in the attached document.

								


				
							AN-xSerialDataOutput.pdf
					
		

			
						
									
									
						
						
			
			
			
			
		


        
        

					

			






	

		
	

















	

	

					



			


				
	









	
    
	

  • 
	
    






    
	
    
		
    
							
					
    
		
    
			
											
			
				
									
							        
			
			
			
      
            
			                            
                        
                on Jul 30, 2013 11:53 AM
            
            
					
      
	
      

		
		
      
					
      Hi, 
      
 
      To get the data of internal shift register of ADF4153 via MUXOUT, Should I write some value on M3~M1 bits of R Divider register(R1) ?
      
 
      At the truth table of MUXOUT, There is no M3~M1 value for specific register.
      
 
      For example, If we want to see the Control Register values via MUXOUT during writing, What we should do ?
      
 
      When we set the M3~M1 as N DIVIDER OUTPUT, this means that we can see N Divider Register values(total 24bits) ?
      
 
      In same way, When we set the M3~M1 as R DIVIDER OUTPUT, this means that we can see R Divider Register values(total 24bits) ?
      
 
      If so, We can see only two registers(R0 and R1) via MUXOUT, Right ?
      
 
      We don't have our board and EVB, so we only rely on your response.
      
 
      Thanks.
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
				
						
				
				
		
		
      
			
		
      
	
      

      

      • 

	

    • 
	
      






      
	
      
		
      
							
					
      
		
      
			
											
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                        
                on Jul 30, 2013 8:01 PM
            
            
					
      
	
      

		
		
      
					
      Serial Data Output (SDO) doesn't actually read out the contents of the various registers. It simples pushes the most recently written data back out to the Muxout pin. So, for example, if you just wrote to R2, then with SDO enabled, 23 clock cycles later, the data written to the DATA pin, will start being output on the Muxout pin.
      
 
      On the ADF4153, to enable SDO, you need to set R3, DB[6:2] = 0b00110. So, you would program 0x1B to R3. This connects Serial Data Output to Muxout.
      
 
      Note: when, you write to R1, it will overwrite the Serial Data Ouput to Muxout setting and connect Muxout to whatever it is set to in the R1 write.
      
 
      So, you can read out the setting programmed to any register, but only immediately after it has been written to the PLL.
      
 
      Does this make sense?
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
				
						
				
				
		
		
      
			
		
      
	
      

      

      •