Transfer Function of ADISimPLL Design using ADF4002

Hi,

My previous question didn't make it, so I'll try again keeping it short.  I'm trying to produce the transfer function for a PLL loop generated by ADISimPLL using an ADF4002.  I managed to get close, but certain aspects of my bode plot don't match the one shown in ADISim.  Is there any way to find out what open/closed loop TF ADISim uses when plotting?

PS. My previous question had a link to a stackexchange question I posted recently.  The SE question has quite a bit more detail, however I think the link got my previous question (on this site) marked as spam!  If moderators deem it safe, maybe you could re-instate the link, since it would avoid me having to type all the specifics out again here.