My previous question didn't make it, so I'll try again keeping it short. I'm trying to produce the transfer function for a PLL loop generated by ADISimPLL using an ADF4002. I managed to get close, but certain aspects of my bode plot don't match the one shown in ADISim. Is there any way to find out what open/closed loop TF ADISim uses when plotting?
PS. My previous question had a link to a stackexchange question I posted recently. The SE question has quite a bit more detail, however I think the link got my previous question (on this site) marked as spam! If moderators deem it safe, maybe you could re-instate the link, since it would avoid me having to type all the specifics out again here.
Here's the link, in case it helps: electronics.stackexchange.com/.../working-out-the-transfer-function-of-a-pll-loop-given-by-the-analog-devices-adis
ADIsimPLL was commissioned by us from a third party developer (Applied Radio Labs) and so we ourselves don't have access to the full source code behind ADIsimPLL which would easily allow us to compare with what you have and see what minute adjustments ADIsimPLL makes to match so closely with the actual measurement results.
In your calculations I can't see exactly where you're off, but you do appear to be close.
I don't think this will add anything you don't already have, but I can direct you to the "Phase Jitter Calculations" section of the Helpfile which expands a little on the transfer functions used. There are also sources given here which might show where some of the theory was lifted from.
As for why your phase is the opposite sign, have you taken into consideration the ADF4002's PFD polarity inversion bit?
PeterW here on this forum is the ADIsimPLL developer. He might be able to point you in the direction of the literature he used for that particular loop filter topology
Hi aandrews, Thanks for taking the time to reply, appreciate that. Actually, I figured out what I did wrong and I had intended to update the SE question (and post something up here), but I got snowed under. The problem was the loop gain equation assumptions around the charge-pump (as I suspected). The second issue was that the open-loop equation actually includes the feedback element. The literature seems divided on this, but it's clear that ADISim does include the feedback divider.
As for the charge pump, if you notice, I assume the output is a voltage and then my loop filter gain block is Vo/Vi. This is not correct. The charge pump outputs a current and so the following stage should be Vo/Icharge. So, when you calculate the loop filter function, it must be voltage out over current in (and I included the large capacitor at the output of the charge pump).
When you do all that, the open loop and closed loop bode plots match ADISim exactly!
Glad to hear you got it sorted, and thanks for posting the update!