EVAL-CN0391-ARDZ Shield: Having trouble increasing the SPS reading rate from the attached thermocouples

Hi, 

I will be moving here to its proper community. Someone here may be able to assist you. 

Q&A - Reference Circuits - EngineerZone (analog.com)

Thanks,

Jellenie

Hi Oscar, 

    The CN0391 example code configures the part for power line rejection (50/60Hz) . 
    You will need to change the filter settings for a different output data rate. See datasheet section starting page 55. 
    The filter is configured in CN0391.cpp function CN0391_init()

    There is also a 100ms delay in CN0391_read_channel that you will need to modify for your application. 

Hope it helps,

-Logan

Hello Logan,

Thank you for your replay. I managed to locate the filter configuring function in the file as well as read the datasheet. From the datasheet, it states that the FS needs to be changed accordingly in the CN0391_init() function to adjust the SPS. As shown in the code, I have changed the FS in two places within the function,

 // Set AD7124_Filter_0 0x21
   regNr = AD7124_Filter_0;
   setValue = AD7124_ReadDeviceRegister(regNr);
   setValue |= AD7124_FILT_REG_FILTER(2);                     // set SINC3
   setValue |= AD7124_FILT_REG_FS(48);                     //FS = 48 => 50 SPS LOW power
   setValue &= 0xFFFFFF;
   AD7124_WriteDeviceRegister(regNr, setValue);// Write data to _ADC
   
   // Set AD7124_Filter_0 0x21
   regNr = AD7124_Filter_1;
   setValue = AD7124_ReadDeviceRegister(regNr);
   setValue |= AD7124_FILT_REG_FILTER(2);                     // set SINC3
   setValue |= AD7124_FILT_REG_FS(48);                     //FS = 48 => 50 SPS
   setValue &= 0xFFFFFF;
   AD7124_WriteDeviceRegister(regNr, setValue);// Write data to _ADC

and if I understand correctly, the comment also suggest that changing the FS to 48 will result in 50 SPS. However, I still got half a second sampling rate even though I have changed the delay, the ms_delay and display_refresh to 1ms. I have also tried with different power modes as well as changing the FS to different values but the results are the same.

Could you instruct me further on my problem? Is there something else I may have overlooked?

Thanks in advance.

Oscar

I would also like to point out that in the datasheet, it states that the SINC4 is set as default in the chip, but the code in the example suggests that the SINC3 has been set which is a bit confusing.  

Hello Logan,

Would you be able to assist with my follow up question.

Kind regards

Oscar

Hello Logan

were you able to figure out how to increase the sps?
I changed the filter to 7, as described in the data sheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7124-8.pdf.

However, the rate just increases to around 1/43ms, so around 340 ms for all 8 channels.

Do you know how to change it properly?
Thank you in davance!

Kind regards

Paul

 // Set AD7124_Filter_0 0x21
   regNr = AD7124_Filter_0;
   setValue = AD7124_ReadDeviceRegister(regNr);
   setValue |= AD7124_FILT_REG_FILTER(7);                     // set SINC3
   setValue |= AD7124_FILT_REG_FS(20);                     //FS = 48 => 50 SPS LOW power
   setValue &= 0xFFFFFF;
   AD7124_WriteDeviceRegister(regNr, setValue);// Write data to _ADC
   
   // Set AD7124_Filter_0 0x21
   regNr = AD7124_Filter_1;
   setValue = AD7124_ReadDeviceRegister(regNr);
   setValue |= AD7124_FILT_REG_FILTER(7);                     // set SINC3
   setValue |= AD7124_FILT_REG_FS(20);                    //FS = 48 => 50 SPS
   setValue &= 0xFFFFFF;
   AD7124_WriteDeviceRegister(regNr, setValue);// Write data to _A