I cannot make sense of the feedback section of the schematic. How are VHYS=1.145V and V_POWER GOOD =1.025V obtained if there's no path to ground through DGND via R12 and R13? The input leakage current to the inverting input of U5 seems to be so small that it should have a negligible effect on the voltages.
a) VREF=VHYS=V_POWER GOOD=1.182V and R12, R13 and C13 are pretty much useless, or
b) There should be another 3.7-3.8M resistor in parallel with C13
What adds to the confusion is that in Figure 1 of CN-0536 the voltage divider is drawn correctly, but in Figure 15 has the same problem as in the full schematic, but the V_POWER GOOD is shown as 1.182V.