Design Considerations - Scaling and Shifting Input signal for Wide Bandwidth Measurements

Want to quickly design an input stage for your data acquisition signal chain that not only scales in the input signal but also ensures correct output levels are achieved to meet the input requirements for your ADC. 

Take a look at our KWIK (Know-how With Integrated Knowledge) FAQ on this  topic   . This FAQ will take you through the key considerations required when designing for a 15Msps 18 bit ADC (LTC2387-18). Covered are key design tips that will help to understand any specific tradeoffs that must be considered, in this example the LTC6228 a low noise, low distortion, very fast, rail to rail output op amp is used. 

This FAQ discusses how to compute the expected noise performance of the circuit, highlighting the key components that must be chosen with care. An LTSpice test bench was used to prove out the design specifications and review with the calculated results.