ADM2587E Power consumption (1)

Q 

I'm designing a battery operated product that will utilize 7 of your RS485
transceiver ADM2587E.

I want to know the power consumption for this IC when:
A) There is no traffic but the circuit is ready to receive/send.
B) DE and !RE have been disabled so that both blocks are disabled.

Is there any way to put the IC into some sort of sleep or low-power mode?

 

A 

We have made the following assumptions for the power consumption questions that
you have:
a) There is no traffic but the circuit is ready to receive/send. This means
that DE is tied to 0V (disabled), and !RE is tied to 0V (enabled).
b) DE and !RE have been disabled so that both blocks are disabled. This means
that DE is tied to 0V (disabled), and !RE is tied to  Vcc (5V) (disabled).

We made some typical measurements for both cases using one of our evaluation
boards in the lab.
For both cases a) and b) above we used an evaluation board EVAL-ADM2587EEBZ
Rev.A, with Vcc at 5V.
For case a) we measured 8mA as the current drawn from the power supply. For a
Vcc of 5V, with P = VI, this gives 40mW as the power consumption for this mode
of operation.
For case b) we measured 9mA as the current drawn from the power supply. For a
Vcc of 5V, with P = VI, this gives 45mW as the power consumption for this mode
of operation.

For the ADM2587E there is no specific way to activate a sleep/low power mode.
Comments
Anonymous

  • I am working on an existing product using the ADM2587E chip.  We are noticing in a new batch of boards that the chip sometimes takes more current to turn on - specifically as the input voltage on the chip is increased from 2.0V to 5.0V the current consumption peaks around 2.6 to 2.8 V in the 31 mA range.    It is interesting to watch the sudden current drop as you cross the ~2.85V threshold for the chip - current almost drops in half from about 31mA to about 15 mA.   

    We have a current limited supply due to how we are using the chip and this is causing us problems with about 1 in 40 units.  We have 10uF on input and output and a current limit of 40 mA for the input power.  We have attempted to reduce that amount but for all units this does not work, even when the input and output capacitance on the chip is reduced to 0.2uF sometimes they will try to draw more current than our board allows.  We do realize this non standard way of using the chips is probably not the greatest practice.  

    Does anyone have experience with startup current variation between these chips lot to lot or chip to chip or is anyone aware of a minimum startup current requirement for these chips over voltage.

    Thanks,

    Steve

    •  Analog Employees 
    in reply to OTI

    Hi OTI,

    These are typical lab  measurements, at +25C:

    At 3.3 V Vcc: the Icc is about 15mA for a 76.5 kbps data rate.

    At 5.0 V Vcc: the Icc is about 13mA for a 76.5 kbps data rate.

    This is for your requested condition DE = /RE = 0 V

    Best regards,

    Richard

  • in reply to RAnslow

    Thank you.

    I look forward to a result

    •  Analog Employees 
    in reply to OTI

    Hi OTI,

    Yes, I can check this in the lab. I can provide you with typical values only (not guaranteed production test values).

    Best regards,

    Richard

  • Hi,I want to know ADM2587E Power consumption when I receive data

    Condition： DE is tied to 0V (disabled), and !RE is tied to 0V (enabled).、Data Rate ≤ 500 kbps （I hope 76.5Kbps)

    Would you tell me the consumption electric current?

    Furthermore, would you　tell me maximum , too?

    (It is not a guarantee, the reference level is all right）

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