Hello all.
I am in the process of designing a 28V power supply for our embedded in-line printing equipment. I have decided to use the LT3845 as my switching controller.
This circuit will regulate down to 28V from this 48V power supply (MFA420PS48 XP Power | Power Supplies - External/Internal (Off-Board) | DigiKey ). We have had great performance from this power supply and can expect the VIN range for this circuit to only deviate 1% from the target 48V.
I based my circuit off of the suggestions made from LTPowerCAD.
With my design parameters that I have chosen, I should be getting (according to LTPowerCAD) a great efficiency across various loads.
After simulating my circuit, I have come to find that my efficiency for my target load is horrible!
--From simulation--
.step iload=1
.step iload=1.25
.step iload=1.5
.step iload=1.75
.step iload=2
.step iload=2.25
.step iload=2.5
.step iload=2.75
.step iload=3
.step iload=3.25
.step iload=3.5
.step iload=3.75
.step iload=4
.step iload=4.25
.step iload=4.5
.step iload=4.75
.step iload=5
.step iload=5.25
.step iload=5.5
Measurement: pin
step AVG(-v(in)*i(vin1)) FROM TO
1 225.006 0 0.0008
2 232.668 0 0.0008
3 239.976 0 0.0008
4 246.681 0 0.0008
5 253.761 0 0.0008
6 260.718 0 0.0008
7 267.657 0 0.0008
8 274.673 0 0.0008
9 281.708 0 0.0008
10 288.89 0 0.0008
11 295.722 0 0.0008
12 302.652 0 0.0008
13 309.739 0 0.0008
14 316.71 0 0.0008
15 323.897 0 0.0008
16 331.119 0 0.0008
17 337.871 0 0.0008
18 345.156 0 0.0008
19 351.935 0 0.0008
20 359.315 0 0.0008Measurement: pout
step AVG(v(vout)*i(i1)) FROM TO
1 20.7663 0 0.0008
2 27.6887 0 0.0008
3 34.6104 0 0.0008
4 41.532 0 0.0008
5 48.4533 0 0.0008
6 55.3746 0 0.0008
7 62.2956 0 0.0008
8 69.2164 0 0.0008
9 76.137 0 0.0008
10 83.0574 0 0.0008
11 89.9777 0 0.0008
12 96.8978 0 0.0008
13 103.817 0 0.0008
14 110.737 0 0.0008
15 117.656 0 0.0008
16 124.574 0 0.0008
17 131.492 0 0.0008
18 138.409 0 0.0008
19 145.326 0 0.0008
20 152.242 0 0.0008Measurement: eff
step pout/pin
1 0.0922923
2 0.119005
3 0.144225
4 0.168364
5 0.190941
6 0.212393
7 0.232744
8 0.251996
9 0.270269
10 0.287506
11 0.304265
12 0.320162
13 0.335177
14 0.349648
15 0.36325
16 0.376221
17 0.389177
18 0.401004
19 0.412933
20 0.423701
I have attached the spice models for the two N-Channel MOSFETs that I used and also my LTSpice circuit.
I am looking for design suggestions and improvements that I can make to the design to reach a target of 80%+ efficiency across this spectrum of loads.
One thing that I am currently investigating is from the datasheet (page 15)
Note that when VIN is high and fSW is high, the transition losses may dominate. A MOSFET with higher RDS(ON) and lower CRSS may provide higher efficiency. MOSFETs with higher voltage VDSS specification usually have higher RDS(ON) and lower CRSS.
I am going to investigate these findings and hopefully get closer to my desired results.
Thank you for the help.
