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im looking for a pfc for a new application

input voltage: 380Vac to 440Vac 50Hz.

output voltage: 700V. 750V is possible too.

output power 2KW.

switching freq: 200Khz.

we dont want to use interleave solution.


the main demand is PF>0.99 and THD<3%.

can the ADP1047 meed those damands?


can you provide the eval board or similar app THD and PF spread sheet results from 20%Load to 100%Load?



Dudu Dayan

  • Hi Dudu Dayan,

    The ADP1047 (single phase) can support all the features in your query. However, about THD - that is something that depends on the inductor and mainly the external EMI filter. This part is controller independent.

    We've done power stages that were at 3.3kW which a pf> 0.99. The current THD is very much dependent on the control loop and that in turn is dependent on the inductor used.

    Lt Comm Data

  • Hi,

    thank for the quick reply,

    i would like to use this ic for a big project and I need some results to rely on.

    currenty we are using some TI Pfc that declares THD<3%.

    can you proved some THD results and reference design from your experience with this IC?


    david Dayan  

  • Uc3854a for instance - line current distortion <3%

    Can you share some spread sheet for the THD results for the 300w&600w eval boards?

  • I don't have anything that I can share with you as the designs are under NDA. Can you point me to the link from TI that claims this?

  • Here is a table of the THD results for the 300W eval board at various power levels.

    Vin(V) Vout(V) Pout(W) Power factor THD
    90 385 0
    90 385 43 0.98 7.7
    90 385 76 0.99 5.1
    90 385 148 >0.99 3.1
    90 385 230 >0.99 1.7
    90 385 300 >0.99 1.2
    120 385 0
    120 385 43 0.95 10.3
    120 385 76 0.98 6.3
    120 385 153 >0.99 2.5
    120 385 230 >0.99 2.3
    120 385 300 >0.99 1.9
    150 385 0
    150 385 43 0.91 12.2
    150 385 76 0.97 9.1
    150 385 153 0.99 4.7
    150 385 230 >0.99 2.9
    150 385 300 >0.99 2.4
    180 385 0
    180 385 43 0.9 15.7
    180 385 76 0.93 10.8
    180 385 153 0.98 6.1
    180 385 230 0.99 3.7
    180 385 300 0.99 2.9
    220 385 0
    220 385 43 17.5
    220 385 76 0.89 10
    220 385 153 0.96 6.2
    220 385 230 0.98 3.6
    220 385 300 0.99 2.5
    260 385 0
    260 385 43 0.58 42.5
    260 385 76 0.83 18.6
    260 385 153 0.94 7.3
    260 385 230 0.97 4.4
    260 385 300 0.98 3.2
  • hi again,

    1. are you sure about the results?

       the THD should increase with input voltage. So the THD at 180Vac is 2.9% and at 220Vac is 2.5% why is that?

    2. Moreover, in your opinion, how does the PFC inductor infuence THD? i think that higher inductance is good for THD due to CCM operation at all AC line shape.

  •  I’m pretty positive that the measurements are correct as they were taking with Labview and a power meter using an automated process. It is kind of odd that the THD goes lower somewhere in the middle. My only guess is that this is the property of the particular inductor and for some reason there is some weird nonlinearity in the inductance property that is causing this.

    Yes, you are correct, the inductance value does change the amount of THD and being in CCM is better for lower THD. 

    Lt Comm Data

  • LT Gurur: I am told by local ADI foolks to post my multiple questions here.

    Pl see at he whole list.

    It would very much appreciated if you can shed some light on each issue.

    Analog Devices ADP1047W Application Discussion

    Questions/ Discussions on ADP1047W

    • Characteristics, Limitations of ADP1047W: Can the chip be used for ANY power level ?
    • The control scheme appears to be porting LT1248/49/1509 analog True?
    • Our application is isolated. How does  the chip handle sensing many parameters that require isolation?
    • App note shows may signals with very high common mode yet fed to the chip, floating yet referenced to some “gnd”…such grounding will pose a problem for us. Can the system be run with power lines, outputs isolated?
    • Because of 3 ph property at the output, THERE IS NO LINE HARMONICS at all- in theory or at worst, very minimal due to asymmetry somewhere.. Can the output sampling frequency still be held at 1.5kHz?
    • Can the chips be programed  thru the GUI to calculate the 3rd line current from the other 2? From sum of all line currents= 0 by identity.
    • Can the chips be programed  thru the GUI to calculate the 3rd line voltage from the other 2? From sum of all line currents= 0 by identity.
    • Can the chips be programed  thru the GUI to calculate the 3rd PWM  from the other 2? In reality, the phase of the third PWM can be derived from computation of the other 2
    • Can only 2 chips be used to control three phase PFC with 3 switches  with the third gate drive computed from the 2 other phases?
    • Can the “Phase shedding” be used in this parallel scheme across multiple 3kW units
    • Can the “start up” phase be programmed?...In our 3phase circuit with resonating branch, isolated output, in theory, there is NO INRIUSH possible. Does the isolated output pose a problem for the control?
    • Can we program the chip either thru GUI or by editing the algorithm so that the PWM duty cycle or T( switching period) is forced to continue with a value just prior to the line voltage going below a threshold of a pre-set value? This is the range where the analog controllers such LT1249 or LT1509 cannot produce any PWM – so these controllers create a small distortion in the current waveform . See below item #6 on “Our Application”.
    • How would one characterize “stability” of such a control system?
    • Can AD7403 MDAT isolated current sensors be integrated with ADP1048W seamlessly through GUI?
    • We plan to use AD7403 also for the line current sensing. Will this integration require special coding or GUI will  help to integrate these?
    • Will the Controller allow to create full duplex Rs422 channels for reporting status/commands/ diagnostics to the Host? Do you have a encoded module we can patch into the existing embedded code for the whole converter such that it collects temperatures, input currents, output voltage, current, processes input command to  Enable/disable , begin transmission, end transmission of Status etc? Could this be a formatting of data that the GUI receives from sensors in RS422 protocol?
    • Can the whole system be modeled to reduce risk and time to market with minimum product/system hardware prototyping?
    • Can the chip with its sensors be made into an “instrumentation” hook up for measuring all ac properties, diagnostics, fault isolation etc. Does it have a separate code block to get into that mode through communication channel or PMbus. Can these data be represented as an instrument panel on the host system or that runs the GUI?
    • Can the loops be characterized online through the GUI instrumentation?
    • Can we use any other boost PFC board to evaluate the control card?

    • Going further on:
    • In one of the items I submitted on the ADP1047 program availability is to have the ability to change the fixed delay on fast loop  after a transient

      In our system, RADAR operate ONLY in pulse load mode. I think our power stage will settle fast. Do you think  it will be possible to change the fixed delay from 630ms to whatever we find suitable in 3 ph conditions?

    More on current sense:

    I am about to do our own power stage pcb while waiting for the Eval kit where I will learn how to use the GUI & check baseline waveforms.

    Interestingly & fortunately, the current sense ADP1047 uses, copied below: is the same as in LT1248 or similar.

    It is negative in the LT system.

    It requires a whole lotta glue circuit to make it negative in a bridgeless PFC.

    I would like to avoid having to use them because ADC with internal level shift capability can do miracles.

    Below the sch, see what LT sees as this current to be & what our power stage can feed raw signal as detected in a utterly simple manner


    LT1248 current brom bridge return node

    Our power stage current waveform/envelope- it is “full wave” rectified with very high precision  circuit)…but + side is not entirely gone.

    A lot of effort to take out the positive side was spent,  but I simply could not eliminate it by analog means without serious distortion.

    Note that each ON time current are about the same: top trace is gate drive generated by LT1248, lower one is the current through the switch( linear segment only). Of ocurse, we can scale it down a lot more…but this gives you an idea about the waveform.

    So the major question is: what should be done to keep the sensed current within the range  useful to the ADP1047 controller?

    We may have to start a conversation with the algorithm writers to figure out what to do.

    I suspect one consequence of having the + side is that LT1248 does not converge & the output keep increasing indefinitely.


    Any help will be highly appreciated.


    Hope you had perfect fireworks.

    We did!

    As we are nearing real work on the eval kit, one thing needs to be addressed.

    As you have seen, the open loop  line current of this power stage is of high fidelity.

    But I have failed to see simulated version anywhere near it in closed loop.

    Most likely culprit is current sensing scheme in LT129 or LT 1509

    I synthesize the current  through RS( .2 Ohm) – and it just is not  what the model looks for.


    In the ADP1047 I am hoping to explore more closely  what exactly the algorithm processes.

    If we cannot get same fidelity as open loop, we may have to use CS only for OC/ or similar functions.

    Can we discuss this in depth & settle for one scheme asap?

    I need  to  get my power board schematic done & out to the PCB designer.



  • ?maybe you can help we with the following discussion added by 

    "Hope you had perfect fireworks.

    We did!"