LT1372 S/S "logic level"

The LT1372 data sheet claims that the S/S pin is "logic level compatible." But what exactly does this mean? I am driving the S/S pin with a 768 kHz square wave from an FPGA at 3.3 V and it's not switching. Pin 8, VSW is not toggling, it remains at the VIN level.

The circuit is basically the dual-output flyback converter shown in the data sheet.

With the S/S pin floating, the output switches as expected.

Thanks!

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    •  Analog Employees 
    on Aug 2, 2018 4:05 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    EZ Admin
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  • 0
    •  Analog Employees 
    on Aug 2, 2018 4:05 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
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