Extending protection for reverse polarity beyond -40V

Thanks Paras - let me know as soon as you can.

FYI, I have been thinking about this also, and am currently thinking there needs to be something to isolate the GATE pin completely in reverse-battery condition. I am thinking to leave the GATE pin connected to R7/C1 to a reverse-battery protected ground connection, but isolate it from the power FETs using a PFET which would turn off when a reverse-battery condition exists. This would ensure all the regular protections available on the chip are able to operate as normal when polarity is correct. I have also added D4 and moved D3 to ensure the input side of the device is floating in this condition.

Something like this:

Let me know when you can.

Dear all,

Here's the kind of thing I'm suggesting may work....has custom models in it so you'll likely need to make a replica using your own libraries. LTC4367_Minus48V.asc 

I don't know enough about the LTC4367 model to know if it correctly simulates reverse battery behaviour - and of course, the simulation certainly won't tell you if you're going to damage the part or other hardware.

Thanks and Regards, 

Thanks for the reply and the suggestion to look at the LTC4380. In this case, the additional load switch can't work for this particular application so the series combination of LTC4380 followed by LTC4367 is not an option....but it has led me to think about some alternative circuit configurations.

I note that there are circuit applications for the LTC4380 which use a back-to-back FET similar to an LTC4367 - however, I notice that for the 4380, the FET common connection is the drain, whereas in all circuit applications for the LTC4367, it is the source terminal of the FETs which is common.

Is this difference deliberate? Is it possible to use the LTC4367 with back-to-back FETs sharing the drain terminal? If so, a circuit modelled similar to the applications suggested in the 4380's datasheet for reverse battery must be possible.

Otherwise - I may choose to implement something using the 4380 instead of the 4367 - in my application, the current level is too high to use an external sense resistor; I note this can be omitted if SNS and OUT are joined.

Thanks.

Hello,

Please take a look at this modified .asc. I believe the power FETs remain off in this simulation, and I also simulate the over-ring condition of applying power suddenly in both directions - the transients appear to be contained. Please advise if you think there is something wrong with this arrangement.

2337.LTC4367_Minus48V.asc

Thanks and Regards.