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sepic_cuk noise reduction

Thread Summary

The user seeks to reduce output ripple below 5mVpp in a circuit with a low-pass filter (LPF) on Vout+ and bypass capacitors on Vout-. The final answer suggests adding an LDO to both output rails, and the user is using a circuit from Analog Devices' Application Note AN-1106, which includes a design spreadsheet. The circuit operates at 1.3MHz with output voltages of +/-6V and a load current of 0.1A.
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Category: Hardware
Product Number: ADP1612

For the circuit here:

How would I go about adding more filtering at the output to decrease overall output ripple?  The above topology has a LPF on the Vout+ but the Vout- only has bypass caps.  I would like to improve performance as I have this circuit in a design.

Improving performance to me would mean reducing output ripple to below 5mVpp, if not better.  I am not certain how to design the LPFs for either output meaning that I may create a nice oscillator due to a wrong load condition.

Also, Would there be a reason to add more filtering (common mode choke, LPF, other bypassing, etc) at the input to also help with noise?  I am running this IC at 1.3MHz.  Output voltages around +/-6V, 0.1A.

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