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Conflict in Error amp priorities in simulation vs datasheet

Category: Datasheet/Specs
Product Number: LT8708

Hi all,

I’m simulating the LT8708 in LTspice and I’m seeing behavior that appears to contradict the datasheet “Error Amp Priorities” (Table 3). I am injecting a small current as mentioned in  Dynamical Current Limit Control of LT8708 to control current limit dynamically. I note that forcing the imon/fb pins directly is not the intention of the macromodel as stated in RE: LT8708 datasheet clarifications , which i am pretty sure im not doing. Im using this part in CCM Conduction mode, as can be seen from the simulation, RVSOFF remains high, the part is definitely switching (not in a “no switching” state).

I would like to draw your attention to the 19-20ms mark, I injected a small current in imon_inp to command higher current (that should cause the IMON_ON to take over and increase Vc to limit negative current on output side (since it has highest priority according to datasheet)


However, what i see is:

VC pin is bottomed out (~0.7 V) and appears to be “trying to decrease” (i.e., pulled low / clamped at minimum)

IMON_ON > 1.21 V

IMON_OP ~ 0 V (so < 1.209 V)

IMON_INN < 1.21 V

IMON_INP > 1.209 V

FBOUT < 1.207 V

FBIN tied high (> 1.205 V)

I think this is inconsistent with Table 3, since the highest-priority condition is:

If IMON_INN > 1.21 V OR IMON_ON > 1.21 V, then VC rises.

In my case IMON_ON is above 1.21 V, so I’d expect VC to be driven up, not bottomed out low. Lower-priority conditions (e.g. IMON_INP > 1.209 V → VC falls) shouldn’t be able to override the top-priority row unless that error amp is disabled.

However, since I’m in CCM, RVSOFF high, and switching is active, I don’t think the “4* no switching occurs → amps disabled” condition from Table 4 applies.

Questions

Is there any datasheet-described operating condition (still in CCM, RVSOFF high, switching active) where IMON_ON > 1.21 V would not cause VC to rise?

Could this simply be a known limitation/bug in the LTspice LT8708 macromodel (priority/enable logic not fully implemented)?



Also, the lt8708 model is completely broken in the latest LTSpice version, I have tested the model to respond similarly in ltspice versions from the earliest version released with the model (some 2018 version LTSpice XVII) all the way to LTSpice 24.0.12.  

PS. I didnt know that newer LTSpice versions breaks older models (LT1999 is also broken in 24.0.12 but ive substituted it with behavioural voltage sources instead)

Attached simulation files:
OCPtest.asc

Edit Notes

added clarification
[edited by: Weiliang at 4:41 PM (GMT -5) on 21 Jan 2026]
  • Hi,

    Datasheet Logic vs. Simulation Behavior

    Datasheet (LT8708 Table 3)

    • Highest priority:
      • If IMON_INN > 1.21 V OR IMON_ON > 1.21 V → VC rises.
    • Lower priority:
      • IMON_INP > 1.209 V → VC falls.
      • FBOUT < 1.207 V → VC rises.
      • FBIN > 1.205 V → VC falls.
    • Disabled condition (Table 4):
      • If no switching occurs (e.g., RVSOFF low, DCM), error amps are disabled.

    Your Simulation

    • IMON_ON > 1.21 V → should force VC up.
    • IMON_INP > 1.209 V → lower priority, should not override.
    • Observed: VC clamped low (~0.7 V), contradicting datasheet.

    Known Issues with LTspice LT8708 Model

    • Analog Devices EngineerZone forum: Users have reported that the LT8708 LTspice macromodel does not correctly implement the error amplifier priority logic. The model sometimes allows lower-priority conditions (like IMON_INP) to override higher-priority ones.
    • Datasheet vs. model mismatch: The macromodel is simplified for convergence and speed, and certain internal comparators and priority logic are not fully represented.
    • Practical implication: Simulation may show VC behavior inconsistent with datasheet-defined priorities, especially when multiple IMON pins are near threshold simultaneously.

    Answer to Your Questions

    1. Is there any datasheet-described condition where IMON_ON > 1.21 V would not cause VC to rise (in CCM, RVSOFF high, switching active)?
      • No. The datasheet does not describe any such exception. As long as switching is active, IMON_ON > 1.21 V should dominate.
    2. Could this be a limitation/bug in the LTspice macromodel?
      • Yes. Multiple reports confirm that the LT8708 LTspice macromodel does not fully implement the error amplifier priority logic. This is a known limitation.

    Recommendations

    • Trust datasheet over LTspice model: For design decisions, rely on the datasheet’s Table 3 and Table 4 rather than simulation quirks.
    • Cross-check with hardware: If possible, validate on bench hardware to confirm VC behavior.
    • Use LTspice cautiously: Treat LT8708 simulations as qualitative (waveform trends, stability checks) rather than absolute truth for comparator priority logic.
    • Contact Analog Devices support: They may provide updated macromodels or application notes clarifying limitations.

    Regards,

    Harshal