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LT7171RV-1 voltage offset

Category: Hardware
Product Number: LT7171

I'm developing a product with LT7171RV-1 supplying 0.8 V to FPGA core. The voltage output by LT7171RV-1 is 10-11 mV lower than expected, and it's far outside of +/-0.25% accuracy advertised.

On PMBUS side, VOUT_COMMAND is 0.7998 V and READ_VOUT outputs 0.7998-0.8003 V, yet when I measure voltage on output capacitor I get 0.78994 V and similar (checked on two high quality voltage meters). FPGA itself reads about 0.78-0.79 V, but its ADC is not that precise.

FPGA has voltage and ground sense pins that are directly connected to VSENSEP and VSENSEN of LT7171RV-1 routed with closely coupled track pair. These are not easily accessible for measurement or alteration.

When I set VOUT_COMMAND to 0.81 V it will bump capacitor voltage to 0.80, so voltage regulation is working. I've tried internal and external compensation, VOUT_RANGE of 0 and 1 and it changes nothing - always 10 mV short. IgnoreRConfigPins is set. Mode is forced PWM around 1 MHz.

I've checked 3 boards, and it's the same offset on all of them. Current at the moment is not high - around 0.5-1 A. Output voltage looks fine on scope – using 20 MHz bandwidth limit I see less than +/- 2 mV ripple (mostly 1 mV ripple), no oscillations or anything suspicious.

I would expect the voltage to be higher than target to compensate board copper loses, but to have too low voltage is hard to explain. And LT7171 sees voltage as in range and regulated to target.

What should I do next? Is there supposed to be some sort of a filter on VSENSEP?

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  • Hi Rafal,

     

    Thanks for the extra tests and files. In order to consolidate everything we are discussing here I am going to close out this engineer zone thread and continue on the case you opened (CS-538333-K7P4H3). So, moving forward let's do our communication on that case.

     

    Apologies for the delay, I didn't realize you are a European account which caused a bit of confusion. 

     

    Cheers,

     

    John

Reply
  • Hi Rafal,

     

    Thanks for the extra tests and files. In order to consolidate everything we are discussing here I am going to close out this engineer zone thread and continue on the case you opened (CS-538333-K7P4H3). So, moving forward let's do our communication on that case.

     

    Apologies for the delay, I didn't realize you are a European account which caused a bit of confusion. 

     

    Cheers,

     

    John

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