Hello,
I am currently facing an issue where when I exceed a load current beyond 0.5A, which is what D1 and D2 are rated for, both of these diodes pop.
I ran a test where I progressively ramped up the load current starting at 0.1A to 0.5A. At each increment, I monitored the Vgs Q1 and watched it progressively increase to further enhance the FET when the load current increased. However, after exceeding 0.5A, D1 and D2 begin to get very hot and eventually blow.
This makes me think that the load current somehow goes through D1, D2, Q3 and to the output load. The strange thing is that the Vgs Q1 is behaving properly, so for that reason it seems like the current is flowing through Q1 and Q2 where it should be. So I am a bit confused.
Do you know why this is happening?
I used the same diodes from Figure 11 in the datasheet and that design expects 7A, with diodes only rated for 0.5A. So, I believe the behavior I am seeing through the diodes is incorrect.
Thank you!

Edit Notes
Changed the title[edited by: ldga at 4:52 PM (GMT -5) on 26 Nov 2025]
