LTC4368 OV protection trip, mosfet does not turn back on

I think when you startup without a load, inrush current into DCDC input filter<1A.
When you startup with a load, inrush+load>1A, which trips an overcurrent fault.
Verify by probing RETRY with a scope and looking for a triangle waveform.

I do not see anything on the Retry pin, it does not seems to be an overcurrent fault, now i have mounted a 22mohm shunt, setting the OC current limit above 2.25A .

This acquisition show the Vin on Ch2 and Vgate on Ch3, with respect to gnd. This is what happens when the board is started with a load, even very ligth, above a certain VIN voltage of 30/32 V, The same appens when an OV fault triggers, above 38 V and then the Vin falls back in the allowed range. The board restart working when VIN continues to drop until less than 22V circa. 

Personally i think that the waveform on the gate is related to the charge pump attemting to driving it to linear, but for a reason it seems to be stuck in saturation region (or in the plateau region of the Vgs), for me it seems like the gate current provided is not enough to discharge and charge Cgd, this will explain the dependency on elevated VIN.

We do not observe any kind of problem with the UV fault. If a UV is triggered and the the voltage rise just above UV the board just restart immediately to work fine.

I've tried to add a Chotswap of 6.8 nF as recommended by the datasheet, but I tink that the problem is not the hotswap, but the high VIN. In that section of the datasheet also a diode is recommended to be added to bypass Rgate during charging operation, (with cathode to cgate), but this will not change the total charge that the gate driver needs to provide. 

The back to back mosfet are the Infineon IPG20N10S4L-35. 

What could be the cause of these problems?  

The problem seems to be related to the Zener diode on the Gate source loop. By removing it the board does not enter that state, I cannot explain why, but now it seems to work better. Although, now I'm trying different combination of Cgate and Rsense in order to not trigger the OC fault when not needed. I veryfied the slew rate during the start-up between Cgate and Cout and it seems to be the same. 

The problem arise when, after an OV fault, the input voltage Vin is taken again under the threshold, and the board restart working: 

At 35V  the board remains in a retry loop with continuos OC faults triggered, while instead at 34V after some retry it goes to regime. 

I understand that there is some hysteresis on the OV comparator, but why I get these OC retry only after an OV fault ? While during the normal start-up I don't see any of them? 

Now I'm exaggerating on Cgate = 470 nF and Rsense = 10 mohm , in theory from the datasheets, with these value I would never have an OC fault.

Where is the problem? Is there something I'm missing? 

Hi Charly, many thanks for the responses. 

Excuse me for the late response, unfortunately, I did not had the time to simulate the design, it was made by another engineer that I did't have the opportunity to reach out. 

I have designed the pcb and then tested the design at the bench, I've solved the issue by adding a delay in the turn on of the DC/DC converter placed after the LTC4368, that by itself does not introduce the issue. 

The DC/DC converter is the THN-3615 (THN 15-3615UIR | Traco Power), for which a LTspice model is not available. This device start working when the Vout of the LTC4368 is around 7-8V, by starting the charge of the bus capacitante at a constant current. It seems that this current is drawn when the LT4368 gate driver is closing the Mosfet, around the active region, so the current is limited, but the driver is not capable to close completely the mosfet, remaining in this state for an quite large time (until the bus capacitance are completely charged, that at this current rate is unfeasible).

If the DCDC is taken off by the remote control, until the mosfets are fully closed, this problem disappear.