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Charging Problem(Charging Time)

Thread Summary

The user designed a board similar to the DC2464A-B evaluation board but experiences a significantly longer charging time (24 seconds vs 2.4 seconds). The final answer suggests checking the charge current, which can be affected by the total resistance between ISNS_CHG and ISNSM, the load, and the inductor ripple current. The layout should closely match the demo board, and the current sense resistors should be Kelvin connected to avoid incorrect readings. Noise in the current sense resistor and the shunt regulator turning on due to cell voltage approaching the shunt regulation voltage (2.7V default) can also reduce the charge current.
AI Generated Content
Category: Hardware
Product Number: LTC3351

Hello,

I designed a board that is almost identical to the DC2464A-B evaluation board.

The components are the same as well.

During testing,it takes about 24 seconds to fully charge,whereas the DC2464A-B completes charging in about 2.4 seconds.

I’m investigating the cause but haven’t found it yet.

If anyone knows, please tell me:the LTC3351 has registers.I’m configuring them with the QuikEval software.Is that sufficient by itself? Or is QuikEval alone not enough?

Also, please let me know other areas I should check.

Best Regards,

HiroSchna

Parents
  • Hi,

    I cannot see every place. Below is the RSNSC connection on the EV board. It looks the application board is shared with the CAP4 node and I don't know what else. Also noticed is that the sense traces go directly below the inductor. Is there a GND plane between the inductor and these traces? These traces should not go under the inductor even on a different layer to prevent any noise from coupling into the traces. The CAP4 pin will have some small amount of current for the ADC readings and more for the balancing currents (VCAP4/220Ω) which might affect the current sense readings. Balancing currents can be milliamps. 

Reply
  • Hi,

    I cannot see every place. Below is the RSNSC connection on the EV board. It looks the application board is shared with the CAP4 node and I don't know what else. Also noticed is that the sense traces go directly below the inductor. Is there a GND plane between the inductor and these traces? These traces should not go under the inductor even on a different layer to prevent any noise from coupling into the traces. The CAP4 pin will have some small amount of current for the ADC readings and more for the balancing currents (VCAP4/220Ω) which might affect the current sense readings. Balancing currents can be milliamps. 

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