Charging Problem(Charging Time)

Hello,

Things that affect the charging time. dt = CdV/dI. If the capacitance is the same, the set VCAP voltage is the same, then the only difference will be the charge current. The charge current is affected by a few things. The total resistance between ISNS_CHG and ISNSM multiplied by the total input current including the load. If the voltage across these pins start to increase close to 32mV then the charge current will be reduced. If there is a load that causes the charge current plus the load to approaches the maximum set input current, the charge current will be reduced. The full charge current is set by the resistance across the ICAP and VCAP pins. This sets an average charge current based on a 30% inductor ripple current. If the inductor is sized to produce a much larger ripple than the average charge current will be reduced. One of the most common issues is the layout. How close does the layout match the demo board? Were the recommended PCB layout recommendations listed in the datasheet followed? If the current sense resistors are not Kelvin connected or shared with other nodes than the voltage observed across either the input current sense resistor or the charger current sense resistor could be incorrect resulting in a lower charge current. Another problem could be noise being injected into the current sense resistor. This noise can also cause the voltage across the sense resistor to be higher than what it actually is and reduce the charge current. 

I should mention one more thing. If for some reason the shunt regulator turn on because one of the cell voltages approaches the shunt regulation voltage (2.7V is the default) then the charge current will be reduced to prevent the high capacitor from exceeding the shunt regulation voltage. 

Hello,

Thank you for your response.
I didn’t expect to hear back so quickly. I appreciate it.
Also, thank you for the advice.

Regarding the PCB layout, I intended to design it almost the same as the evaluation board, but when I double-checked, I noticed that the Kelvin connection at the sensing resistor (RSNSC1), which controls the charging current to the capacitors, is shared. I’ve attached an excerpt of the layout drawing. I believe this section should be corrected—what do you think?

I also measured the actual current through the sensing resistors with a multimeter and, at the same time, monitored the charging voltage and current with the QuikEval software. I’ve attached the data. The input voltage is 20 V.

• RSNSI1–RSNSH1: about 5.9 mV, so 0.37 A.
• RSNSC1: about 3.9 mV, so 0.78 A.

Comparing this with the information from QuikEval, the input current is almost consistent, but the capacitor charging current is quite different. Is this likely due to the Kelvin connection issue you pointed out?

Today, I plan to cut the traces and rewire to implement a proper Kelvin connection to RSNSC1, then perform an operational check. I will report back with the results.

Best Regards,

HiroSchna

MartyM 

Hello,MartyM,

I will resend the same content.

Thank you for your response.
I didn’t expect to hear back so quickly. I appreciate it.
Also, thank you for the advice.

Regarding the PCB layout, I intended to design it almost the same as the evaluation board, but when I double-checked, I noticed that the Kelvin connection at the sensing resistor (RSNSC1), which controls the charging current to the capacitors, is shared. I’ve attached an excerpt of the layout drawing. I believe this section should be corrected—what do you think?

I also measured the actual current through the sensing resistors with a multimeter and, at the same time, monitored the charging voltage and current with the QuikEval software. I’ve attached the data. The input voltage is 20 V.

• RSNSI1–RSNSH1: about 5.9 mV, so 0.37 A.
• RSNSC1: about 3.9 mV, so 0.78 A.

Comparing this with the information from QuikEval, the input current is almost consistent, but the capacitor charging current is quite different. Is this likely due to the Kelvin connection issue you pointed out?

Today, I plan to cut the traces and rewire to implement a proper Kelvin connection to RSNSC1, then perform an operational check. I will report back with the results.

Best Regards,

HiroSchna

Hi,

I cannot see every place. Below is the RSNSC connection on the EV board. It looks the application board is shared with the CAP4 node and I don't know what else. Also noticed is that the sense traces go directly below the inductor. Is there a GND plane between the inductor and these traces? These traces should not go under the inductor even on a different layer to prevent any noise from coupling into the traces. The CAP4 pin will have some small amount of current for the ADC readings and more for the balancing currents (VCAP4/220Ω) which might affect the current sense readings. Balancing currents can be milliamps. 

MartyM 

Hello,MartyM

Thank you for your response.

I cut the trace and rewired it directly to ensure a proper Kelvin connection, then checked the operation.

As a result, I obtained the same results as the evaluation board (DC2464A-B).

When I checked with an input voltage of 20V, the charging time was about 3 seconds for both boards.

Today, I plan to attach a load and measure the discharge time.

Also, as you pointed out, the sense trace was shared with the CAP4 node.

Therefore, as described above, I cut this trace and rewired it directly.

There is a GND plane under the inductor, but as you mentioned, I will modify the pattern so that the trace does not pass directly under the inductor.

Thank you for your advice.

Best Regards,

HiroSchna